xr16v2751im Exar Corporation, xr16v2751im Datasheet - Page 12

• Manufacturer Part Number: xr16v2751im
• Description: High Performance Duart With 64-byte Fifo And Powersave Feature
• Manufacturer: Exar Corporation

XR16V2751
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO AND POWERSAVE FEATURE
time will have a jitter (+/- 1/16) whenever the DLD is non-zero and is an odd number. When using a non-
standard data rate crystal or external clock, the divisor value can be calculated with the following equation(s):
The closest divisor that is obtainable in the V2751 can be calculated using the following formula:
In the formulas above, please note that:
TRUNC (N) = Integer Part of N. For example, TRUNC (5.6) = 5.
ROUND (N) = N rounded towards the closest integer. For example, ROUND (7.3) = 7 and ROUND (9.9) = 10.
A >> B indicates right shifting the value ’A’ by ’B’ number of bits. For example, 0x78A3 >> 8 = 0x0078.
F
IGURE
ROUND( (Required Divisor - TRUNC(Required Divisor) )*16)/16 + TRUNC(Required Divisor), where
Required Divisor (decimal) = (XTAL1 clock frequency / prescaler) / (serial data rate x 16), with 16X mode EMSR[7] = 1
Required Divisor (decimal) = (XTAL1 clock frequency / prescaler / (serial data rate x 8), with 8X mode EMSR[7] = 0
5. B
AUD
XTAL1
XTAL2
R
ATE
G
ENERATOR
DLD = ROUND( (Required Divisor-TRUNC(Required Divisor) )*16)
Crystal
Buffer
Osc/
Channels
To Other
DLL = TRUNC(Required Divisor) & 0xFF
DLM = TRUNC(Required Divisor) >> 8
Divide by 4
Divide by 1
Prescaler
Prescaler
12
MCR Bit-7=0
MCR Bit-7=1
(default)
DLL, DLM and DLD
Fractional Baud
Rate Generator
Registers
Logic
to Transmitter
and Receiver
Rate Clock
16X or 8X
Sampling
REV. 1.0.1