xr16m680 Exar Corporation, xr16m680 Datasheet - Page 40

• Manufacturer Part Number: xr16m680
• Description: 1.62v To 3.63v High Performance Uart With 32-byte Fifo
• Manufacturer: Exar Corporation

XR16M680
1.62V TO 3.63V HIGH PERFORMANCE UART WITH 32-BYTE FIFO
This register replaces SPR (during a read) and is accessible when FCTR[6] = 1. This register is also
accessible when LCR = 0xBF. It is suggested to read the FIFO Level Count Register at the Scratchpad
Register location when FCTR bit-6 = 1. See
FC[7:0]: RX/TX FIFO Level Count
Receive/Transmit FIFO Level Count. Number of characters in Receiver FIFO (FCTR[7] = 0) or Transmitter
FIFO (FCTR[7] = 1) can be read via this register. Reading this register is not recommended when transmitting
or receiving data.
FCTR[1:0]: Reserved
FCTR[2]: IrDa RX Inversion
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FCTR[3]: Auto RS-485 Direction Control
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FCTR[5:4]: Reserved
FCTR[6]: Scratchpad Swap
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FCTR[7]: Programmable Trigger Register Select
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4.14
4.15
Logic 0 = Select RX input as encoded IrDa data (Idle state will be LOW).
Logic 1 = Select RX input as inverted encoded IrDa data (Idle state will be HIGH).
Logic 0 = Standard ST16C550 mode. Transmitter generates an interrupt when transmit holding register
becomes empty and transmit shift register is shifting data out.
Logic 1 = Enable Auto RS485 Direction Control function. The direction control signal, RTS# pin, changes its
output logic state from LOW to HIGH one bit time after the last stop bit of the last character is shifted out.
Also, the Transmit interrupt generation is delayed until the transmitter shift register becomes empty. The
RTS# output pin will automatically return to a LOW when a data byte is loaded into the TX FIFO. However,
RTS# behavior can be inverted by setting EMSR[3] = 1.
Logic 0 = Scratch Pad register is selected as general read and write register. ST16C550 compatible mode.
Logic 1 = FIFO Count register (Read-Only), Enhanced Mode Select Register (Write-Only). Number of
characters in transmit or receive FIFO can be read via scratch pad register when this bit is set. Enhanced
Mode Select Register is selected when it is written into.
Logic 0 = Register FC selected for RX.
Logic 1 = Register FC selected for TX.
RX/TX FIFO Level Count Register (FC) - Read-Only
Feature Control Register (FCTR) - Read/Write
Table
12.
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REV. 1.0.0