xr16m598 Exar Corporation, xr16m598 Datasheet - Page 18

• Manufacturer Part Number: xr16m598
• Description: 1.62v To 3.63v High Performance Octal Uart With 16-byte Fifo
• Manufacturer: Exar Corporation

XR16M598
1.62V TO 3.63V HIGH PERFORMANCE OCTAL UART WITH 16-BYTE FIFO
(Xon1, Xon2, Xoff1, Xoff2) and controls TX transmissions accordingly. Under the above described flow control
mechanisms, flow control characters are not placed (stacked) in the user accessible RX data buffer or FIFO.
In the event that the receive buffer is overfilling and flow control needs to be executed, the 598 automatically
sends an Xoff message (when enabled) via the serial TX output to the remote modem. The 598 sends the Xoff-
1,2 characters two character times (= time taken to send two characters at the programmed baud rate) after
the receive FIFO crosses the programmed trigger level. To clear this condition, the 598 will transmit the
programmed Xon-1,2 characters as soon as receive FIFO is less than one trigger level below the programmed
trigger level.
* After the trigger level is reached, an xoff character is sent after a short span of time (= time required to send 2 characters);
for example, after 2.083ms has elapsed for 9600 baud and 10-bit word length setting.
A special character detect feature is provided to detect an 8-bit character when bit-5 is set in the Enhanced
Feature Register (EFR). When this character (Xoff2) is detected, it will be placed in the FIFO along with normal
incoming RX data. The 598 compares each incoming receive character with Xoff-2 data. If a match exists, the
received data will be transferred to FIFO and ISR bit-4 will be set to indicate detection of special character.
Although the Internal Register Table shows Xon, Xoff Registers with 8 bits of character information, the actual
number of bits is dependent on the programmed word length. Line Control Register (LCR) bits 0-1 defines the
number of character bits, i.e., either 5 bits, 6 bits, 7 bits, or 8 bits. The word length selected by LCR bits 0-1
also determines the number of bits that will be used for the special character comparison. Bit-0 in the Xon, Xoff
Registers corresponds to the LSB bit for the receive character.
2.12
RX T
RIGGER
Special Character Detect
14
1
4
8
Table 7
L
EVEL
below explains this.
INT P
T
IN
ABLE
A
14
1
4
8
CTIVATION
7: A
UTO
X
ON
/X
X
(
OFF
CHARACTERS IN RX FIFO
OFF
C
18
(S
HARACTER
OFTWARE
14*
1*
4*
8*
(
S
) S
) F
ENT
LOW
)
C
ONTROL
X
(
CHARACTERS IN RX FIFO
ON
C
HARACTER
0
1
4
8
(
S
) S
REV. 1.0.0
ENT
)