xr16m564 Exar Corporation, xr16m564 Datasheet - Page 54

• Manufacturer Part Number: xr16m564
• Description: 1.62v To 3.63v Quad Uart With 32-byte Fifo
• Manufacturer: Exar Corporation

REV. 1.0.0
GENERAL DESCRIPTION................................................................................................ 1
PIN DESCRIPTIONS ........................................................................................................ 4
1.0 PRODUCT DESCRIPTION ...................................................................................................................... 9
2.0 FUNCTIONAL DESCRIPTIONS ............................................................................................................ 10
3.0 UART INTERNAL REGISTERS............................................................................................................. 24
4.0 INTERNAL REGISTER DESCRIPTIONS .............................................................................................. 26
F
A
ORDERING INFORMATION
EATURES
PPLICATIONS
2.1 CPU INTERFACE .............................................................................................................................................. 10
2.2 DEVICE RESET ................................................................................................................................................. 11
2.3 CHANNEL SELECTION .................................................................................................................................... 11
2.4 CHANNELS A-D INTERNAL REGISTERS ....................................................................................................... 12
2.5 INT OUPUTS FOR CHANNELS A-D................................................................................................................. 12
2.6 DMA MODE ....................................................................................................................................................... 12
2.7 CRYSTAL OSCILLATOR OR EXTERNAL CLOCK INPUT.............................................................................. 13
2.8 PROGRAMMABLE BAUD RATE GENERATOR WITH FRACTIONAL DIVISOR ........................................... 13
2.9 TRANSMITTER.................................................................................................................................................. 15
2.10 RECEIVER ....................................................................................................................................................... 17
2.11 AUTO RTS (HARDWARE) FLOW CONTROL ................................................................................................ 18
2.12 AUTO RTS HYSTERESIS ............................................................................................................................... 18
2.13 AUTO CTS FLOW CONTROL......................................................................................................................... 19
2.14 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL...................................................................................... 20
2.15 SPECIAL CHARACTER DETECT.................................................................................................................. 20
2.16 INFRARED MODE ........................................................................................................................................... 21
2.17 SLEEP MODE WITH AUTO WAKE-UP .......................................................................................................... 22
2.18 INTERNAL LOOPBACK................................................................................................................................. 22
4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY .................................................................................. 26
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY ............................................................................... 26
4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE ................................................................................ 26
F
F
F
F
T
T
T
T
T
F
F
T
F
F
F
F
T
F
T
F
F
T
T
IGURE
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
ABLE
IGURE
IGURE
IGURE
IGURE
ABLE
IGURE
ABLE
IGURE
IGURE
ABLE
ABLE
2.9.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY........................................................................................... 15
2.9.2 TRANSMITTER OPERATION IN NON-FIFO MODE .................................................................................................... 16
2.9.3 TRANSMITTER OPERATION IN FIFO MODE ............................................................................................................. 16
2.10.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY ............................................................................................ 17
4.3.1 IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION ............................................................................... 26
4.3.2 IER VERSUS RECEIVE/TRANSMIT FIFO POLLED MODE OPERATION.................................................................. 27
1: C
2: C
3: INT P
4: INT P
5: TXRDY#
6: T
7: A
8: A
9: UART CHANNEL A AND B UART INTERNAL REGISTERS ..................................................................................... 24
10: INTERNAL REGISTERS DESCRIPTION. S
1. XR16M564 B
2. P
3. P
4. XR16M564 T
5. T
6. B
7. T
8. T
9. R
10. R
11. A
12. I
13. I
.................................................................................................................................................... 1
YPICAL DATA RATES WITH A
HANNEL
HANNEL
UTO
UTO
YPICAL
RANSMITTER
RANSMITTER
IN
IN
AUD
ECEIVER
NFRARED
NTERNAL
UTO
ECEIVER
.............................................................................................................................................. 1
O
O
IN
IN
RTS (H
X
UT
UT
R
ON
O
O
RTS
ATE
A-D S
A-D S
AND
C
A
A
PERATION FOR
PERATION FOR
/X
RYSTAL
SSIGNMENT
SSIGNMENT
O
L
OFF
T
O
G
PERATION IN NON
OOP
ARDWARE
AND
RANSMIT
RXRDY# O
YPICAL
PERATION IN
LOCK
ENERATOR
O
O
ELECT IN
ELECT IN
............................................................................................................................... 4
PERATION IN NON
PERATION IN
(S
CTS F
B
C
OFTWARE
ACK IN
D
ONNECTIONS
I
IAGRAM
NTEL
D
F
F
) F
OR
OR
ATA
T
R
16 M
68 M
LOW
............................................................................................................................................... 14
UTPUTS IN
LOW
RANSMITTER FOR
ECEIVER FOR
C
FIFO
/M
68-
48-
24 MH
) F
HANNELS
E
FIFO
OTOROLA
C
.......................................................................................................................................... 1
-FIFO M
ODE
ODE
NCODING AND
C
LOW
PIN
PIN
ONTROL
TABLE OF CONTENTS
ONTROL
AND
-FIFO M
.................................................................................................................................. 13
Z CRYSTAL OR EXTERNAL CLOCK AT
PLCC P
QFN P
................................................................................................................................. 11
................................................................................................................................. 11
AND
C
FIFO
A
ONTROL
A - D ................................................................................................................... 23
ODE
UTO
D
C
O
F
........................................................................................................................ 18
ATA
HANNELS
LOW
PERATION
ACKAGE AND
ODE
AND
.................................................................................................................... 17
ACKAGES
C
RTS F
R
HANNELS
B
ECEIVE
C
.............................................................................................................. 16
............................................................................................................... 20
US
DMA M
HADED BITS ARE ENABLED WHEN
ONTROL
I
LOW
A-D ................................................................................................. 12
NTERCONNECTIONS
....................................................................................................... 19
1
I
D
N
A-D ........................................................................................... 12
ODE FOR
80-
ATA
C
16
1.62V TO 3.63V QUAD UART WITH 32-BYTE FIFO
M
ONTROL
ODE
PIN
AND
D
ECODING
LQFP P
..................................................................................... 16
68 M
C
M
HANNELS
ODE
ODE AND
.......................................................................... 10
16X S
.......................................................................... 21
ACKAGE
....................................................................... 18
A-D ........................................................... 13
AMPLING
64-
............................................................... 3
EFR B
PIN
LQFP P
................................................... 15
IT
-4=1 ....................................... 25
ACKAGES
XR16M564/564D
......................... 2