xr16m580im48 Exar Corporation, xr16m580im48 Datasheet - Page 25

• Manufacturer Part Number: xr16m580im48
• Description: 1.62v To 3.63v High Performance Uart With 16-byte Fifo
• Manufacturer: Exar Corporation

REV. 1.0.0
A
A2-A0
DDRESS
0 0 0
0 0 0
0 0 1
0 1 0
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
1 1 1
1 1 1
T
ABLE
EMSR
N
MCR
RHR
MSR
THR
FCR
LCR
SPR
R
LSR
IER
ISR
FC
AME
EG
7: INTERNAL REGISTERS DESCRIPTION.
RD/WR
RD/WR Divisor
RD/WR
RD/WR
R
W
WR
WR
WR
WR
RD
RD
RD
RD
RD
EAD
RITE
/
RX FIFO
RX FIFO
Enabled
interrupt
Fast IR
Enable
Trigger
Enable
FIFOs
Global
CTS#
mode
select
Pres-
B
Error
Input
BRG
caler
Bit-7
Bit-7
CD#
Bit-7
Bit-7
Xoff
Int.
IT
0/
0/
-7
RX FIFO
IR Mode
Enabled
interrupt
ENable
Enable
Trigger
Enable
Set TX
THR &
Empty
FIFOs
RTS#
Break
select
mode
mode
B
Input
Bit-6
Bit-6
TSR
Bit-6
Bit-6
9-bit
LSR
RI#
Int.
IT
1.62V TO 3.63V HIGH PERFORMANCE UART WITH 16-BYTE FIFO
0/
0/
-6
16C550 Compatible Registers
TX FIFO
Interrupt
Xoff Int.
XonAny
Disable
Enable
Trigger
Empty
Parity
DSR#
B
Input
Bit-5
Bit-5
THR
Bit-5
Bit-5
RTS
CTS
Set
RX
IT
0/
0/
0/
0
-5
25
RX Break RX Fram-
TX FIFO
Interrupt
Lopback
Internal
Disable
Enable
Trigger
Enable
Sleep
Parity
CTS#
Mode
B
Even
Input
Bit-4
Bit-4
Bit-4
Bit-4
Xoff
TX
IT
0/
0/
0
-4
S
HADED BITS ARE ENABLED WHEN
Int Enable
Wake up
INT Out-
ing Error
Stat. Int.
Modem
Source
(OP2#)
Enable
Enable
Enable
RTS in
RS485
Parity
Invert
mode
B
Delta
Bit-3
Bit-3
Bit-3
CD#
Bit-3
Bit-3
INT
put
IT
0
-3
RX Line
Enable
Source
imme-
Reset
OP1#
Parity
B
FIFO
Delta
Send
Error
diate
Bit-2
Bit-2
Stat.
Bit-2
Stop
Bit-2
Bit-2
INT
Bits
RI#
Int.
TX
RX
TX
IT
0
-2
Control
Enable
Source
Length
Output
control
Empty
DSR#
Reset
RTS#
Word
Over-
count
B
FIFO
Delta
FIFO
Error
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
bit-1
INT
run
TX
RX
RX
Int
IT
0
-1
EFR B
Control
Enable
Source
Enable
Length
Output
control
Ready
FIFOs
DTR#
CTS#
count
B
Word
Delta
FIFO
Bit-0
Bit-0
Data
Bit-0
Bit-0
Data
Bit-0
Bit-0
bit-0
INT
RX
Int.
RX
IT
0
XR16M580
-0
IT
-4=1
if EFR[4]=1
if EFR[4]=0
LCR[7] = 0
LCR[7] = 0
LCR≠0xBF
LCR≠0xBF
LCR≠0xBF
FCTR[6]=0
LCR≠0xBF
FCTR[6]=1
C
OMMENT
or