ICS501 Integrated Circuit System, ICS501 Datasheet - Page 3

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ICS501

Manufacturer Part Number
ICS501
Description
Loco (tm) PLL Clock Multiplier
Manufacturer
Integrated Circuit System
Datasheet

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MDS 501 I
Int egrat ed C ircuit Syst ems
External Components
Decoupling Capacitor
As with any high performance mixed-signal IC, the
ICS501 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01µF must be connected
between VDD and the GND. It must be connected
close to the ICS501 to minimize lead inductance. No
external power supply filtering is required for the
ICS501.
Series Termination Resistor
A 33 terminating resistor can be used next to the CLK
pin for trace lengths over one inch.
52 5 Race Str eet, San Jose, C A 9 5126
3
Crystal Load Capacitors
The total on-chip capacitance is approximately 12 pF. A
parallel resonant, fundamental mode crystal should be
used. The device crystal connections should include
pads for small capacitors from X1 to ground and from
X2 to ground. These capacitors are used to adjust the
stray capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming
process, it is important to keep stray capacitance to a
minimum by using very short PCB traces (and no vias)
between the crystal and device. Crystal capacitors, if
needed, must be connected from each of the pins X1
and X2 to ground.
The value (in pF) of these crystal caps should equal
(C
capacitance in pF. Example: For a crystal with a 16 pF
load capacitance, each crystal capacitor would be 8 pF
[(16-12) x 2] = 8.
L
-12pF)*2. In this equation, C
tel ( 408) 295- 9800
LOCO
TM PLL Clock Multiplier
L
= crystal load
w w w.i c s t .c o m
Revision 080102
ICS501

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