ak5366vr AKM Semiconductor, Inc., ak5366vr Datasheet - Page 23

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ak5366vr

Manufacturer Part Number
ak5366vr
Description
24-bit 48khz Adc With Selector/pga/alc
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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ASAHI KASEI
T Input Volume
The AK5366VR includes two independent channel analog volumes (IPGA) with 37 levels at 0.5dB steps located in front
of the ADC.
The IPGA is a true analog volume control that improves the S/N ratio as seen in Table 9. Independent zero-crossing
detection is used to ensure level changes only occur during zero-crossings. If there are no zero-crossings, the level will
then change after a time-out period (Table 10); the time-out period scales with fs. If a new value is written to the IPGA
register before the IPGA changes at the zero crossing or time-out, the previous value becomes invalid. The timer (channel
independent) for time-out is reset and the timer restarts for new IPGA value.
[Writing operation at ALC Enable]
T Output Volume
The AK5366VR includes two independent channel digital volumes (DATT) with 144 levels at 0.5dB steps located behind
the ADC. When changing levels, transitions are executed via soft changes; thus no switching noise occurs during these
transitions. The data must not be written over 90H.
MS0526-E-00
Writing to the area over 7FH (Table 17) of IPGL/R registers (04H, 05H) is ignored during ALC operation. After ALC
is disabled, the IPGA changes to the last written data by zero-crossing or time-out. In case of writing to the DATT area
(08H, 09H), the DATT changes even if ALC is enabled.
ZTM1
0
0
1
1
fs=48kHz, A-weight
ZTM0
0
1
0
1
Table 10. Zero crossing timeout period
ATTL/R7-0
Zero crossing timeout period
7DH
8FH
8EH
7FH
7EH
81H
80H
02H
01H
00H
Table 11. DATT Code Table
:
:
Table 9. PGA+ADC S/N
103dB
1152/fs
2304/fs
4608/fs
288/fs
0dB
Attenuation
Mute (
- 23 -
+8.0dB
+7.5dB
+1.0dB
+0.5dB
62.5dB
0.5dB
1.0dB
0dB
63dB
:
:
Input Gain Setting
)
100dB
+6dB
Default
@fs=48kHz
24ms
48ms
96ms
6ms
+18dB
89dB
Default
[AK5366VR ]
2006/07

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