tc59lm913amb-50 TOSHIBA Semiconductor CORPORATION, tc59lm913amb-50 Datasheet - Page 36

• Manufacturer Part Number: tc59lm913amb-50
• Description: 512mbits Network Fcram1 Sstl_2 Interface
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Bank, Address
AUTO-REFRESH TIMING (CL = 4, BL = 4)
Command
L/UDQS
(output)
(output)
CLK
CLK
CLK
DQ
Note: In case of CL = 4, I
WRA REF
Hi-Z
Hi-Z
Bank,
RDA
UA
When the Auto-Refresh operation is performed, the synthetic average interval of Auto-Refresh command
specified by t
t
t
than Read / Write operation.
I
REFI
REFI
0
RCD
=1 cycle
t
is average interval time in 8 Refresh cycles that is sampled randomly.
is specified to avoid partly concentrated current of Refresh operation that is activated larger area
1
t
REFI
LAL
LA
1
WRA REF
=
REFI
I
RC
Total time of 8 Refresh cycle
= 5 cycles
must be satisfied.
2
REFC
I
RAS
t
CL = 4
2
must be meet 18 clock cycles.
DESL
= 4 cycles
3
8
WRA REF
8 Refresh cycle
4
t
3
WRA
I
RCD
5
=
Q0
t
=1 cycle
1
+ t
Q1
REF
2
6
+ t
Q2 Q3
3
+ t
t
4
7
8
+ t
I
7
REFC
WRA REF
5
+ t
= 18 cycles
6
n − 1
+ t
DESL
7
+ t
TC59LM913AMB-50
t
8
Hi-Z
Hi-Z
8
n
2005-11-08 36/46
WRA REF
n + 1
WRA
RDA
or
MRS or
LAL or
n + 2
REF
Rev 1.1