lp8358 National Semiconductor Corporation, lp8358 Datasheet - Page 9

• Manufacturer Part Number: lp8358
• Description: 150ma, Ucap, Low Dropout Voltage Regulator With Power Good
• Manufacturer: National Semiconductor Corporation

Application Notes
The LP8358 is a linear regulator with power good output
designed to be used with a low ESR, low cost ceramic
capacitors.
EXTERNAL CAPACITORS
The LP8358 regulator requires an output capacitor to main-
tain stability. The capacitor must be at least 1µF or greater.
The capacitor can be low-ESR ceramic chip capacitor, how-
ever for improved capacitance over temperature, tantalum
capacitors can be used.
A 1µF input capacitor is recommend when the supply capaci-
tance is more than 10 inches away from the device, or when
the supply is a battery.
X7R dielectric ceramic capacitors are recommended be-
cause of their temperature performance. X7R-type capacitor
change capacitance by 15% over their operating tempera-
ture range and are the most stable type of ceramic capaci-
tors. Z5U and Y5V dielectric capacitors change value by as
much 50% and 60% respectively over their operating tem-
perature range. To use a ceramic chip capacitor with Y5V
dielectric, the value must be much higher than a X7/R ce-
ramic or a tantalum capacitor to ensure the same minimum
capacitance value over the operating temperature range.
Tantalum capacitors have a very stable dielectric (10% over
their operating temperature range) and can also be used
with this device.
ENABLE/SHUTDOWN
The LP8358 has an active high enable pin that allows the
regulator to be disabled. Applying a Logic Level low (
to the Shutdown pin will cause the output to turn off, in this
state current consumed by the regulator goes nearly to zero.
Applying a Logic Level high (
voltage. The enable/shutdown pin must not be left floating; a
floating enable pin may cause an indeterminate state on the
output.
ACTIVE SHUTDOWN
The LP8358 is designed with a N-channel MOSFET that
acts as a shutdown clamp. The N-channel turns on when the
device is disabled to allow the output capacitor and load to
discharge
POWER GOOD
The power good output is an open-drain output with extreme
low R
reset generator once the regulated voltage is up and/ or a
DSON
. It is designed essentially to work as a power-on
>
2.0V) enables the output
<
0.4 V)
9
fault condition. When a fault condition occurs, the output of
the power good pin goes low. The power good output comes
back up once the output has reached 97% of its nominal
value and 1ms to 5ms delay has passed , see timing dia-
gram.
The LP8358 internal circuit monitors overcurrent, tempera-
ture and falling output voltage. If one of these conditions is
flagged this indicates a fault condition.
The flagged condition output is fed into an onchip delay
circuit that drives the open drain output transistor.
TRANSIENT RESPONSE
The LP8358 implements a unique output stage to dramati-
cally improve transient response recovery time. The output is
a totem-pole configuration with a P-channel MOSFET pass
device and a N-channel MOSFET clamp. The N-channel
clamp is a significantly smaller device that prevents the
output voltage from overshooting when a heavy load is
removed. This feature helps to speed up the transient re-
sponse by significantly decreasing transient response recov-
ery time during the transition from heavy load to light load.
THERMAL BEHAVIOR
The LP8358 regulator has internal thermal shutdown to pro-
tect the device from over heating. Under all operating con-
ditions, the maximum junction temperature of the LP8358
must be below 125˚C. Maximum power dissipation can be
calculated based on the output current and the voltage drop
across the part. The maximum power dissipation is
θ
for the LP8358 in the SOT23-5 package. T
ambient temperature T
perature of the die, 125˚C.
When operating the LP8358 at room temperature, the maxi-
mum power dissipation is 425mW.
The actual power dissipated by the regulator is
Substituting P
for the operating condition that is critical to the application
will give the maximum operating condition for the regulator
circuit. To prevent the device from entering thermal shut-
down, maximum power dissipation cannot be exceeded.
JA
is the junction-to-ambient thermal resistance, 235˚C/W
D(MAX)
P
P
D
D(MAX)
= (V
, determined above, for P
IN
= (T
J(MAX)
–V
J(MAX)
OUT
is the maximum junction tem-
)I
L
–T
+V
A
IN
)/θ
I
GND
A
JA
is the maximum
D
and solving
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