adm9240 Analog Devices, Inc., adm9240 Datasheet - Page 5

• Manufacturer Part Number: adm9240
• Description: Low Cost Microprocessor System Hardware Monitor
• Manufacturer: Analog Devices, Inc.

Pin Number
1
2
3
4
5
REV. 0
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Mnemonic
NTEST_OUT/A0
A1
SDA
SCL
FAN1
FAN2
CI
GNDD
V
INT
NTEST_IN/AOUT
RESET
GNDA
+V
+12 V
+5 V
+3.3 V
+2.5 V
+V
VID4
VID3
VID2
VID1
VID0
CC
CCP2
CCP1
IN
IN
IN
IN
Description
Digital I/O. Dual Function Pin. The lowest order programmable bit of the Serial Bus Address.
This pin functions as an output when doing a NAND Tree test.
Digital Input. The highest order programmable bit of the Serial Bus Address.
Digital I/O. Serial Bus Bidirectional Data. Open-drain output.
Digital Input. Serial Bus Clock.
Digital Input. 0 to V
Digital Input. 0 to V
Digital I/O. An active high input from an external circuit that latches a Chassis Intrusion
event. This line can go high without any clamping action regardless of the powered state of
the ADM9240. The ADM9240 provides an internal open drain on this line, controlled by
Bit 6 of Register 40h or Bit 7 of Register 46h, to provide a minimum 20 ms pulse on this line,
to reset the external Chassis Intrusion Latch.
Digital Ground. Internally connected to all of the digital circuitry.
Power (+2.85 V to +5.75 V). Typically powered from +3.3 V or +5 V power rail. Bypass with
the parallel combination of 10 F (electrolytic or tantalum) and 0.1 F (ceramic) bypass
capacitors.
Digital Output. Interrupt Request (open drain). The output is enabled when Bit 1 of the
Configuration Register is set to 1. The default state is disabled.
Digital Input/Analog Output. An active-high input that enables NAND Tree mode board-
level connectivity testing. Refer to section on NAND Tree testing. Also functions as a pro-
grammable analog output when NAND Tree is not selected
Digital I/O. Master Reset, 5 mA driver (open drain), active low output with a 20 ms minimum
pulsewidth. Available when enabled via Bit 7 in Register 44h, and set using Bit 4 in Register
40h. Also acts as reset input when pulled low (e.g., power-on reset).
Analog Ground. Internally connected to all analog circuitry. The ground reference for all
analog inputs.
Analog Input. Monitors processor core voltage +V
monitor the –12 V supply by adding two external resistors.
Analog Input. Monitors +12 V supply.
Analog Input. Monitors +5 V supply.
Analog Input. Monitors +3.3 V supply.
Analog Input. Monitors +2.5 V supply.
Analog Input. Monitors processor core voltage +V
Digital Input. Core Voltage ID readouts from the processor. This value is read into the
VID4 Status Register.
Digital Input. Core Voltage ID readouts from the processor. This value is read into the
VID0–VID3 Status Register.
Digital Input. Core Voltage ID readouts from the processor. This value is read into the
VID0–VID3 Status Register.
Digital Input. Core Voltage ID readouts from the processor. This value is read into the
VID0–VID3 Status Register.
Digital Input. Core Voltage ID readouts from the processor. This value is read into the
VID0–VID3 Status Register.
PIN FUNCTION DESCRIPTIONS
CC
CC
amplitude fan tachometer input.
amplitude fan tachometer input.
–5–
CCP2
CCP1
(0 V–3.6 V). Can also be used to
(0 V–3.6 V).
ADM9240