x5323v14zt1 Intersil Corporation, x5323v14zt1 Datasheet
x5323v14zt1
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x5323v14zt1 Summary of contents
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Data Sheet CPU Supervisor with 32Kb SPI EEPROM FEATURES • Selectable watchdog timer • Low V detection and reset assertion CC —Five standard reset threshold voltages —Re-program low V reset threshold voltage CC using special programming sequence —Reset signal ...
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Ordering Information PART NUMBER RESET PART (ACTIVE LOW) MARKING X5323P-4.5A X5323P AL X5325P-4.5A X5323PZ-4.5A (Note) X5323P Z AL X5325PZ-4.5A X5323PI-4.5A X5323P AM X5325PI-4.5A X5323PIZ-4.5A (Note) X5323P Z AM X5325PIZ-4.5A X5323S8-4.5A X5323 AL X5325S8-4.5A X5323S8Z-4.5A (Note) X5323 Z AL X5325S8Z-4.5A (Note) ...
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Ordering Information (Continued) PART NUMBER RESET PART (ACTIVE LOW) MARKING X5323V14-2.7A X5323V AN X5325V14-2.7A X5323V14Z-2.7A X5323V Z AN X5325V14Z-2.7A (Note) (Note) X5323V14I-2.7A X5325V14I-2.7A X5323V14IZ-2.7A X5323V Z AP X5325V14IZ-2.7A (Note) (Note) X5323P-2.7 X5323P F X5325P-2.7 X5323PZ-2.7 (Note) X5323P Z F X5325PZ-2.7 ...
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PIN CONFIGURATION 8 Ld SOIC/PDIP CS/WDT 1 X5323/ PIN DESCRIPTION Pin Pin (SOIC/PDIP) TSSOP Name 1 1 CS/WDI SCK ...
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PRINCIPLES OF OPERATION Power-on Reset Application of power to the X5323/X5325 activates a power-on reset circuit. This circuit goes active at about 1V and pulls the RESET/RESET pin active. This signal prevents the system microprocessor from starting to operate with ...
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Figure 3. V Programming Sequence Flow Chart TRIP New V Applied = CC Old V Applied + Error CC Emax = Maximum Desired Error Figure 4. Sample V Reset Circuit TRIP 4.7K V TRIP Adj. Program 6 X5323, X5325 V ...
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SPI SERIAL MEMORY The memory portion of the device is a CMOS serial EEPROM array with Intersil’s block lock protection. The array is internally organized The device features a Serial Peripheral Interface (SPI) and software proto- col ...
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The Write Enable Latch (WEL) bit indicates the sta- tus of the write enable latch. When WEL = 1, the latch is set HIGH and when WEL = 0 the latch is reset LOW. The WEL bit is a volatile, ...
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In Circuit Programmable ROM Mode This mechanism protects the block lock and watchdog bits from inadvertent corruption. programmable ROM mode) the WP pin In the locked state ( is LOW and the nonvolatile bit WPEN is “1”. This mode disables ...
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Figure 6. Read Status Register Sequence CS 0 SCK SI High Impedance SO Figure 7. Write Enable Latch Sequence CS SCK SI SO Figure 8. Write Sequence SCK Instruction ...
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Figure 9. Status Register Write Sequence CS 0 SCK SI High Impedance SO SYMBOL TABLE WAVEFORM INPUTS OUTPUTS Must be Will be steady steady May change Will change from LOW from LOW to HIGH to HIGH May change Will change ...
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ABSOLUTE MAXIMUM RATINGS Temperature under bias ................... -65°C to +135°C Storage temperature ........................ -65°C to +150°C Voltage on any pin with respect to V D.C. output current ............................................... 5mA Lead temperature (soldering, 10s) .................... 300°C RECOMMENDED OPERATING CONDITIONS Temperature Min. ...
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EQUIVALENT A.C. LOAD CIRCUIT 2.06kΩ Output RESET/RESET 3.03kΩ 100pF A.C. CHARACTERISTICS (Over recommended operating conditions, unless otherwise specified) Serial Input Timing Symbol f Clock frequency SCK t Cycle time CYC t CS lead time LEAD t ...
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Serial Input Timing CS t LEAD SCK MSB IN High Impedance SO Serial Output Timing Symbol f Clock frequency SCK t Output disable time DIS t Output valid from clock low V t Output hold time HO ...
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Power-Up and Power-Down Timing Volts RESET (X5323) RESET (X5323) RESET Output Timing Symbol V Reset trip point voltage, X5323-4.5A, X5323-4.5A TRIP Reset trip point voltage, X5323, X5325 Reset trip point voltage, X5323-2.7A, X5325-2.7A Reset trip point voltage, ...
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RESET/RESET Output Timing Symbol Parameter t Watchdog time out period, WDO WD1 = 1, WD0 = 0 WD1 = 0, WD0 = 1 WD1 = 0, WD0 = pulse width to reset the watchdog CST t Reset ...
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V Programming Specifications V TRIP Parameter t SCK V program voltage setup time VPS TRIP t SCK V program voltage hold time VPH TRIP t V program pulse width P TRIP t V level setup time TSU TRIP t V ...
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TYPICAL PERFORMANCE V Supply Current vs. Temperature ( Watchdog Timer Watchdog Timer Watchdog Timer Off ( -40 25 Temp (°C) V vs. Temperature (programmed at ...
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PACKAGING INFORMATION 8-Lead Plastic Small Outline Gull Wing Package Type S Pin 1 Index 0.010 (0.25) 0.020 (0.50) 0° - 8° 0.016 (0.410) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 19 X5323, X5325 Pin 1 0.014 ...
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PACKAGING INFORMATION Half Shoulder Width On All End Pins Optional .073 (1.84) Typ. 0.010 (0.25) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH 20 X5323, X5325 8-Lead Plastic Dual In-Line Package Type ...
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... Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...