lp3470im5x-4.63 National Semiconductor Corporation, lp3470im5x-4.63 Datasheet - Page 6

• Manufacturer Part Number: lp3470im5x-4.63
• Description: Tiny Power On Reset Circuit
• Manufacturer: National Semiconductor Corporation

www.national.com
Application Information
RESET TIMEOUT PERIOD
The Reset Timeout Period (t
external capacitor (C
Ceramic chip capacitor rated at or above 10V is sufficient.
The Reset Timeout Period (t
following formula:
For example a C
no delay due to t
SRT should be left floating.
RESET OUTPUT
In applications like microprocessor (µP) systems, errors
might occur in system operation during power-up, power-
down, or brownout conditions. It is imperative to monitor the
power supply voltage in order to prevent these errors from
occurring.
The LP3470 asserts a reset signal whenever the V
voltage is below a threshold (V
anteed to be a logic low for V
the reset threshold, the reset is kept asserted for a time
period (t
this interval Reset goes to logic high. If a brownout condition
occurs (monitored voltage falls below the reset threshold
minus a small hysteresis), Reset goes low. When V
Timing Diagram
RP
) programmed by an external capacitor (C
RP
t
1
RP
of 100 nF will achieve a t
is needed in a certain application, the pin
(ms) = 2000 x C
1
) connected to pin SRT of LP3470. A
RP
RP
CC
) can be calculated using the
) is programmable using an
RTH
>
0.5V. Once V
) voltage. Reset is guar-
1
(µF).
RP
of 200 ms. If
CC
CC
exceeds
1
supply
); after
CC
re-
6
turns above the reset threshold, Reset remains low for a time
period t
PULL-UP RESISTOR SELECTION
The LP3470’s Reset output structure is a simple open-drain
N-channel MOSFET switch. A pull-up resistor (R
connected to V
R
output MOSFET (Q
than 680Ω guarantees this. R
to ensure a logic high while supplying all the leakage current
through the Reset pin. A resistor value of less than 68kΩ
satisfies this condition. A typical pull-up resistor value of 20
kΩ is sufficient in most applications.
NEGATIVE-GOING V
The LP3470 is relatively immune to short duration negative-
going V
acteristics show the Maximum Transient Duration vs. Nega-
tive Transient Amplitude (graph titled Transient Rejection),
for which reset pulses are not generated. This graph shows
the maximum pulse width a negative-going V
may typically have without causing a reset pulse to be
issued. As the transient amplitude increases (i.e. goes far-
ther below the reset threshold), the maximum allowable
pulse width decreases. A 0.1 µF bypass capacitor mounted
close to V
1
should be large enough to limit the current through the
RP
CC
CC
before going to logic high.
transients (glitches). The Typical Operating Char-
provides additional transient immunity.
CC
.
1
) below 10 mA. A resistor value of more
CC
TRANSIENTS
1
should also be small enough
10001604
CC
1
) should be
transient