acpl-w481 Avago Technologies, acpl-w481 Datasheet

acpl-w481

Manufacturer Part Number

acpl-w481

Description

Inverted Logic, High Cmr Optocoupler For Intelligent Power Modules And Igbt/mosfet Gate Drive

Manufacturer

Avago Technologies

Datasheet

1.ACPL-W481.pdf (9 pages)

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ACPL-P481 and ACPL-W481

Inverted Logic, High CMR Optocoupler for Intelligent

Power Modules and IGBT/MOSFET Gate Drive

Data Sheet

Description

The high-speed ACPL-P481/W481 optocoupler contains

a GaAsP LED, photo detector and a Schmitt trigger that

eliminates the need for external waveform conditioning

circuits.

The totem pole output eliminates the need for a pull-up

resistor. An Intelligent Power Module, Power MOSFET or

IGBT can be driven directly.

Propagation delay difference between devices has been

minimized to maximize inverter efficiency through

reduced switching dead time.

Applications

x IPM Interface Isolation

x Isolated IGBT/MOSFET Gate Drive

x AC and Brushless DC Motor Drives

x Industrial Inverters

x General Digital Isolation

Functional Diagram

Note: A 0.1 PF bypass capacitor must be connected between pins 4 and 6.

Truth Table (Positive Logic)

Cathode

Anode

OFF

LED

N.C.

HIGH

LOW

CAUTION: It is advised that normal static precautions be taken in handling and assembly

of this component to prevent damage and/or degradation which may be induced by ESD.

SHIELD

Ground

Features

x Inverted output type (totem pole output)

x Performance Specified for Common IPM Applications

x Short Maximum Propagation Delays

x Minimized Pulse Width Distortion (PWD)

x Very High Common Mode Rejection (CMR)

x Hysteresis

x Available in Stretched SO-6 Package.

x Package Clearance/Creepage at 8 mm (ACPL-W481)

x Safety Approval: (pending)

Specifications

x Wide Operating Temperature Range: –40°C to 100°C.

x Maximum Propagation Delay t

x Maximum Pulse Width Distortion (PWD) = 250 ns.

x Propagation Delay Difference: Min. –100 ns, Max. 250 ns

x Wide Operating V

x 20 kV/Ps Minimum Common Mode Rejection (CMR) at

Over Industrial Temperature Range.

– UL Recognized with 3750 V

– CSA Approved.

– IEC/EN/DIN EN 60747-5-5 Approved with V

ACPL-W481) for 1 minute per UL1577.

891 V

ACPL-W481, under option 060.

= 1000 V.

peak

for ACPL-P481 and V

Range: 4.5 V to 20 V

PHL

IORM

rms

/ t

PLH

(5000 Vrms for

= 1140 V

= 350 ns

peak

IORM

for

Related parts for acpl-w481

acpl-w481 Summary of contents

Page 1

... Short Maximum Propagation Delays x Minimized Pulse Width Distortion (PWD) x Very High Common Mode Rejection (CMR) x Hysteresis x Available in Stretched SO-6 Package. x Package Clearance/Creepage (ACPL-W481) x Safety Approval: (pending) – UL Recognized with 3750 V ACPL-W481) for 1 minute per UL1577. – CSA Approved. – IEC/EN/DIN EN 60747-5-5 Approved with V 891 V ACPL-W481, under option 060 ...

Page 2

... Option Part number RoHS Compliant -000E -500E ACPL-P481 ACPL-W481 -060E -560E To order, choose a part number from the part number column and combine with the desired option from the option column to form an ordering part number. Example 1: ACPL-P481-560E: Stretched SO-6 Surface Mount package in Tape and Reel packaging with IEC/EN/DIN EN 60747-5-5 Safety Approval and RoHS compliant ...

Page 3

... ACPL-W481 Stretched SO-6 Package clearance 0.381 ±0.127 0.015 ±0.005 7.62 +0.127 [0.300] 6.807 0 +0.005 0.268 - 0.000 0.45 0.018 0.20 ±0.10 0.008 ±0.004 0.750 ±0.250 [0.0295 ±0.010] 35° NOM. 11.500 ±0.25 0.453 ±0.010 Recommended Pb-Free IR Profile The recommended reflow profile is per JEDEC Standard, J-STD-020 (latest revision). Non-halide flux should be used. ...

Page 4

... Clearance) Minimum External L(102) Tracking (External Creepage) Minimum Internal Plastic Gap (Internal Clearance) Tracking Resistance CTI (Comparative Tracking Index) Isolation Group sec sec sec) ini ACPL-P481 ACPL-W481 Units 7.0 8.0 mm 8.0 8.0 mm 0.08 0.08 mm >175 >175 V IIIa IIIa Symbol ACPL-P481 ACPL-W481 I – – ...

Page 5

Table 3. Absolute Maximum Ratings Parameter Storage Temperature Operating Temperature Average Input Current Peak Transient Input Current (< pulse width, 300 pps) (< 200 Ps pulse width, < 1% duty cycle) Reverse Input Voltage Average Output Current Supply ...

Page 6

Table 5. Electrical Specifications Over recommended operating conditions T to 0.8 V, unless otherwise specified. All typicals at T Parameter Symbol Logic Low Output Voltage V OL Logic High Output Voltage V OH Output Leakage Current I OHH (V = ...

Page 7

... PA). This test is performed before the 100% production test for partial discharge (Method b) I for any given device. PHL PLH Test Conditions Fig. RH < 50 min 25° 500 V I MHz I < 0 (6000 V for ACPL-W481) for RMS RMS Note > 2 ...

Page 8

I = 6mA F 0.14 0.13 Vcc = 4.5V Vcc = 20V 0.12 0.11 0.1 - TEMPERATURE - °C A Figure 1. Typical Logic Low Output Voltage vs. Temperature 4 -2.6mA 4 3.5 ...

Page 9

... Figure 9. Test Circuit for Common Mode Transient Immunity and Typical Waveforms For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2010 Avago Technologies. All rights reserved. ...

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