ep7311 Cirrus Logic, Inc., ep7311 Datasheet - Page 23

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ep7311

Manufacturer Part Number
ep7311
Description
Ep7311 Data Sheet
Manufacturer
Cirrus Logic, Inc.
Datasheet

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Static Memory Single Write Cycle
DS506F1
EXPRDY
EXPCLK
WRITE
WORD
WORD
nMWE
HALF-
nMOE
nCS
A
D
Note:
1. The cycle time can be extended by integer multiples of the clock period (22 ns at 45 MHz, 27 ns at 36 MHz, 54 ns at
18.432 MHz, and 77 ns at 13 MHz), by either driving EXPRDY low and/or by programming a number of wait states. EXPRDY is
sampled on the falling edge of EXPCLK before the data transfer. If low at this point, the transfer is delayed by one clock period
where EXPRDY is sampled again. EXPCLK need not be referenced when driving EXPRDY, but is shown for clarity.
2. Zero wait states for sequential writes is not permitted for memory devices which use nMWE pin, as this cannot be driven with
3. Address, Data, Halfword, Word, and Write hold state until next cycle.
valid timing under zero wait state conditions.
t
t
HWd
WDd
Figure 8. Static Memory Single Write Cycle Timing Measurement
t
t
t
EXs
CSd
Ad
t
MWd
t
Dv
©
Copyright Cirrus Logic, Inc. 2005
(All Rights Reserved)
t
EXh
t
MWh
High-Performance, Low-Power System on Chip
t
CSh
EP7311
23

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