cop8acc7 National Semiconductor Corporation, cop8acc7 Datasheet - Page 7

• Manufacturer Part Number: cop8acc7
• Description: 8-bit Cmos Otp Microcontroller With 16k Memory And High Resolution A/d
• Manufacturer: National Semiconductor Corporation

Input Capacitance
Load Capacitance on D2
Instruction Cycle Time (t
Crystal, Resonator
R/C Oscillator
Inputs
Output Propagation Delay (Note 14)
MICROWIRE Setup Time (t
MICROWIRE Hold Time (t
MICROWIRE Output Propagation Delay (t
Input Pulse Width (Note 15)
Reset Pulse Width
DC Electrical Characteristics
−40˚C
AC Electrical Characteristics
−40˚C
Note 10: Maximum rate of voltage change must be
Note 11: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open.
Note 12: The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations. Measurement of I
or sinking current; with L, C, and G0–G5 programmed as low outputs and not driving a load; all outputs programmed low and not driving a load; all inputs tied to
V
in crystal clock mode.
Note 13: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages
when biased at voltages greater than V
(typical). These two pins will not latch up. The voltage at the pins must be limited to less than 14V. WARNING: Voltages in excess of 14V will cause damage to
the pins. This warning excludes ESD transients.
Note 14: The output propagation delay is referenced to the end of the instruction cycle where the output change occurs.
Note 15: Parameter characterized but not tested.
Note 16: t
t
t
t
SO, SK
All Others
Interrupt Input High Time
Interrupt Input Low Time
Timer 1, 2, 3 Input High Time
Timer 1, 2, 3 Input Low Time
CC
SETUP
HOLD
PD1
; clock monitor and comparator disabled. Parameter refers to HALT mode entered via setting bit 7 of the G Port data register. Part will pull up CKI during HALT
, t
PD0
C
T
T
= Instruction Cycle Time.
A
A
Parameter
+85˚C unless otherwise specified [OTP Value]
+85˚C unless otherwise specified [OTP Value]
Parameter
C
)
UWH
UWS
) (Note 14)
) (Note 14)
CC
(the pins do not have source current when biased at a voltage below V
(Note 14)
(Note 14)
UPD
<
0.5 V/ms.
)
(Continued)
Conditions
2.5V, [2.7V]
4V
2.5V, [2.7V]
4V
4V
2.5V, [2.7V]
4V
2.5V, [2.7V]
R
4V
2.5V, [2.7V]
4V
2.5V, [2.7V]
V
V
V
L
CC
CC
CC
= 2.2k, C
V
V
V
V
V
V
4V
4V
4V
CC
CC
CC
CC
CC
CC
Conditions
<
7
5.5V
5.5V
5.5V
5.5V
5.5V
L
5.5V
= 100 pF
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
<
<
<
<
<
<
4V
4V
4V
4V
4V
4V
Min
Min
200
500
150
2.5
1.0
7.5
3.0
60
20
56
1
1
1
1
1
>
V
DD
CC
CC
). The effective resistance to V
HALT is done with device neither sourcing
and the pins will have sink current to V
Typ
Typ
1000
Max
Max
1.75
220
DC
DC
DC
DC
0.7
2.5
7
1
www.national.com
CC
is 750
Units
Units
µs
µs
µs
µs
ns
ns
ns
ns
µs
µs
µs
µs
ns
ns
ns
µs
t
t
t
t
pF
pF
C
C
C
C
CC