cop87l88cf National Semiconductor Corporation, cop87l88cf Datasheet - Page 9

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cop87l88cf

Manufacturer Part Number
cop87l88cf
Description
8-bit Cmos Otp Microcontrollers With 16k Memory And A/d Converter
Manufacturer
National Semiconductor Corporation
Datasheet

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Typical Performance Characteristics
Port D Source Current
Pin Descriptions
V
V
on-board A/D converter.
CKI is the clock input. This can come from an R/C generated
oscillator, or a crystal oscillator (in conjunction with CKO).
See Oscillator Description section.
RESET is the master reset input. See Reset Description sec-
tion.
The device contains three bidirectional 8-bit I/O ports (C, G
and L), where each individual bit may be independently con-
figured as an input (Schmitt trigger inputs on ports G and L),
output or TRI-STATE under program control. Three data
memory address locations are allocated for each of these
I/O ports. Each I/O port has two associated 8-bit memory
mapped registers, the CONFIGURATION register and the
output DATA register. A memory mapped address is also re-
served for the input pins of each I/O port. (See the memory
map for the various addresses associated with the I/O ports.)
Figure 4 shows the I/O port configurations. The DATA and
CONFIGURATION registers allow for each port bit to be in-
dividually configured under software control as shown below:
CC
REF
CONFIGURA-
and GND are the power supply pins.
Register
and AGND are the reference voltage pins for the
TION
0
0
1
1
Register
DATA
0
1
0
1
Hi-Z Input
(TRI-STATE Output)
Input with Weak Pull-Up
Push-Pull Zero Output
Push-Pull One Output
Port Set-Up
DS101134-35
Port D Sink Current
(−40˚C to +85˚C) (Continued)
9
PORT L is an 8-bit I/O port. All L-pins have Schmitt triggers
on the inputs.
Port L supports Multi-Input Wakeup (MIWU) on all eight pins.
L4 and L5 are used for the timer input functions T2A and
T2B. L0 and L1 are not available on the 44-pin version of the
device, since they are replaced by V
L1 are not terminated on the 44-pin version. Consequently,
reading L0 or L1 as inputs will return unreliable data with the
44-pin package, so this data should be masked out with user
software when the L port is read for input data. It is recom-
mended that the pins be configured as outputs.
Port L has the following alternate features:
L7
L6
L5
L4
L3
L2
L1
L0
MIWU
MIWU
MIWU or T2B
MIWU or T2A
MIWU
MIWU
MIWU
MIWU
FIGURE 4. I/O Port Configurations
DS101134-36
REF
and AGND. L0 and
www.national.com
DS101134-6

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