mc9s12b128 Freescale Semiconductor, Inc, mc9s12b128 Datasheet

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mc9s12b128

Manufacturer Part Number
mc9s12b128
Description
Mc9s12b128 16-bit Automotive Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Freescale Semiconductor
HCS12BFAMILYPP
Rev. 2.8, 7/2005
Product Brief
MC9S12B Family
16-bit Microcontroller
1
Introduction
Designed for automotive multiplexing applications, members of the MC9S12B-Family of 16 bit
Flash-based microcontrollers are fully pin compatible and enable users to choose between different
memory and peripheral options for scalable designs. All MC9S12B-Family members are composed of
standard on-chip peripherals including a 16-bit central processing unit (CPU12), up to 256K bytes of Flash
EEPROM, 8K bytes of RAM, 2K bytes of EEPROM, two asynchronous serial communications interfaces
(SCI), serial peripheral interface (SPI), an input capture/output compare timer (TIM), 16-channel, 10-bit
analog-to-digital converter (ADC), an 8-channel pulse-width modulator (PWM), one CAN 2.0 A, B
software compatible module (MSCAN12) and an Inter-IC Bus. System resource mapping, clock
generation, interrupt control and bus interfacing are managed by the lite integration module (LIM). The
MC9S12B-Family has full 16-bit data paths throughout, however, the external bus can operate in an 8-bit
narrow mode so single 8-bit wide memory can be interfaced for lower cost systems. The inclusion of a
PLL circuit allows power consumption and performance to be adjusted to suit operational requirements.
In addition to the I/O ports available in each module, up to 22 I/O ports are available with Wake-Up
capability from STOP or WAIT mode.
© Freescale Semiconductor, Inc., 2005. All rights reserved.

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mc9s12b128 Summary of contents

Page 1

... The inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational requirements. In addition to the I/O ports available in each module I/O ports are available with Wake-Up capability from STOP or WAIT mode. © Freescale Semiconductor, Inc., 2005. All rights reserved. HCS12BFAMILYPP Rev. 2.8, 7/2005 ...

Page 2

Features 2 Features Not all features listed here are available in all configurations. Additional information about D and B family inter-operability is given in: EB386 “HCS12 D-Family Compatibility Considerations” and EB388 “Using the HCS12 D_Family as a development platform for ...

Page 3

Counter with 7-bit Prescaler — 8 programmable input capture or output compare channels — Simple PWM Mode — Modulo Reset of Timer Counter — 16-bit Pulse Accumulator — External Event Counting — Gated Time Accumulation • 8 PWM ...

Page 4

... Port input only PAD = 8 input only. 11 inputs provide Interrupt capability ( IRQ, XIRQ) 4 Table 1. List of MC9S12B-Family members Package Device CAN SCI 112LQFP MC9S12B256 1 80QFP MC9S12B256 1 112LQFP MC9S12B128 1 80QFP MC9S12B128 1 112LQFP MC9S12B64 1 80QFP MC9S12B64 1 MC9S12B Family, Rev. 2.8 SPI ...

Page 5

Byte Flash EEPROM 2K, 4K, 8K Byte RAM 1K, 2K Byte EEPROM VDDR VSSR VREGEN Voltage Regulator VDD1,2 VSS1,2 Single-wire Background BKGD Debug Module XFC Clock and VDDPLL Reset PLL VSSPLL Generation EXTAL Module XTAL RESET PE0 ...

Page 6

Features PWM3/KWP3/PP3 1 PWM2/KWP2/PP2 2 PWM1/KWP1/PP1 3 PWM0/KWP0/PP0 4 XADDR17/PK3 5 XADDR16/PK2 6 XADDR15/PK1 7 XADDR14/PK0 8 IOC0/PT0 9 IOC1/PT1 10 IOC2/PT2 11 IOC3/PT3 12 VDD1 13 VSS1 14 IOC4/PT4 15 IOC5/PT5 16 IOC6/PT6 17 IOC7/PT7 18 XADDR19/PK5 19 XADDR18/PK4 ...

Page 7

PWM3/KWP3/PP3 1 PWM2/KWP2/PP2 2 PWM1/KWP1/PP1 3 PWM0/KWP0/PP0 4 IOC0/PT0 5 IOC1/PT1 6 IOC2/PT2 7 IOC3/PT3 8 VDD1 9 VSS1 10 IOC4/PT4 11 IOC5/PT5 12 IOC6/PT6 13 IOC7/PT7 14 MODC/TAGHI/BKGD 15 ADDR0/DATA0/PB0 16 ADDR1/DATA1/PB1 17 ADDR2/DATA2/PB2 18 ADDR3/DATA3/PB3 19 ADDR4/DATA4/PB4 20 ...

Page 8

Features $0000 $0400 $0800 $1000 $2000 $4000 $8000 EXT $C000 $FF00 VECTORS VECTORS $FFFF NORMAL EXPANDED SINGLE CHIP The figure shows a useful map, which is not the map out of reset. After reset the map is: $0000 - $03FF: ...

Page 9

EXT $C000 $FF00 VECTORS VECTORS $FFFF NORMAL EXPANDED SINGLE CHIP The figure shows a useful map, which is not the map out of reset. After reset the map is: $0000 - $03FF: Register ...

Page 10

Features $0000 $0400 $0800 $1000 $3800 $4000 $8000 EXT $C000 $FF00 VECTORS VECTORS $FFFF NORMAL EXPANDED SINGLE CHIP The figure shows a useful map, which is not the map out of reset. After reset the map is: $0000 - $03FF: ...

Page 11

T L PIN 1 112 IDENT 1 VIEW 0.050 θ C1 (Y) (Z) VIEW AB Figure 6. 112-pin LQFP Mechanical Dimensions (case no. 987) Freescale Semiconductor ...

Page 12

Features 0.20 M 0.05 A-B 0. -C- H SEATING PLANE G DATUM -H- PLANE W X DETAIL C Figure 7. 80-pin QFP Mechanical Dimensions (case no. 841B ...

Page 13

Freescale Semiconductor MC9S12B Family, Rev. 2.8 Features 13 ...

Page 14

... Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005. All rights reserved. ...

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