mc9s08sg16 Freescale Semiconductor, Inc, mc9s08sg16 Datasheet - Page 251

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mc9s08sg16

Manufacturer Part Number
mc9s08sg16
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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When BDM is active, the coherency mechanism is frozen (unless reset by writing to TPMxSC register)
such that the buffer latches remain in the state they were in when the BDM became active, even if one or
both halves of the modulo register are written while BDM is active. Any write to the modulo registers
bypasses the buffer latches and directly writes to the modulo register while BDM is active.
Reset the TPM counter before writing to the TPM modulo registers to avoid confusion about when the first
counter overflow will occur.
16.3.4
TPMxCnSC contains the channel-interrupt-status flag and control bits used to configure the interrupt
enable, channel configuration, and pin function.
Freescale Semiconductor
Reset
Reset
Reset
W
W
W
R
R
R
CHnF
Bit 15
Bit 7
TPM Channel n Status and Control Register (TPMxCnSC)
0
0
0
0
7
7
7
Figure 16-12. TPM Channel n Status and Control Register (TPMxCnSC)
= Unimplemented or Reserved
Figure 16-10. TPM Counter Modulo Register High (TPMxMODH)
Figure 16-11. TPM Counter Modulo Register Low (TPMxMODL)
CHnIE
14
0
6
0
0
6
6
6
MSnB
13
5
0
5
5
0
5
0
MC9S08SG32 Data Sheet, Rev. 4
MSnA
12
0
4
0
0
4
4
4
ELSnB
11
0
3
0
0
3
3
3
Chapter 16 Timer/PWM Module (S08TPMV3)
ELSnA
10
0
2
0
0
2
2
2
1
9
0
1
1
0
1
0
0
Bit 8
Bit 0
0
0
0
0
0
0
0
251

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