mc9s08dv16 Freescale Semiconductor, Inc, mc9s08dv16 Datasheet - Page 190

• Manufacturer Part Number: mc9s08dv16
• Description: Hcs08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 10 Analog-to-Digital Converter (S08ADC12V1)
ALTCLK for this MCU. Consult the module introduction for information on ALTCLK specific to this
MCU.
A conversion complete event sets the COCO and generates an ADC interrupt to wake the MCU from wait
mode if the ADC interrupt is enabled (AIEN = 1).
10.4.7
Stop mode is a low power-consumption standby mode during which most or all clock sources on the MCU
are disabled.
10.4.7.1
If the asynchronous clock, ADACK, is not selected as the conversion clock, executing a stop instruction
aborts the current conversion and places the ADC in its idle state. The contents of ADCRH and ADCRL
are unaffected by stop3 mode. After exiting from stop3 mode, a software or hardware trigger is required
to resume conversions.
10.4.7.2
If ADACK is selected as the conversion clock, the ADC continues operation during stop3 mode. For
guaranteed ADC operation, the MCU’s voltage regulator must remain active during stop3 mode. Consult
the module introduction for configuration information for this MCU.
If a conversion is in progress when the MCU enters stop3 mode, it continues until completion. Conversions
can be initiated while the MCU is in stop3 mode by means of the hardware trigger or if continuous
conversions are enabled.
A conversion complete event sets the COCO and generates an ADC interrupt to wake the MCU from stop3
mode if the ADC interrupt is enabled (AIEN = 1).
10.4.8
The ADC module is automatically disabled when the MCU enters stop2 mode. All module registers
contain their reset values following exit from stop2. Therefore, the module must be re-enabled and
re-configured following exit from stop2.
190
MCU Stop3 Mode Operation
MCU Stop2 Mode Operation
Stop3 Mode With ADACK Disabled
Stop3 Mode With ADACK Enabled
The ADC module can wake the system from low-power stop and cause the
MCU to begin consuming run-level currents without generating a system
level interrupt. To prevent this scenario, software should ensure the data
transfer blocking mechanism (discussed in
Conversions) is cleared when entering stop3 and continuing ADC
conversions.
MC9S08DV60 Series Data Sheet, Rev 3
NOTE
Section 10.4.4.2, “Completing
Freescale Semiconductor