c8051f410 Silicon Laboratories, c8051f410 Datasheet - Page 253
c8051f410
Manufacturer Part Number
c8051f410
Description
2.0 V, 32/16 Kb Flash, Smartclock, 12-bit Adc
Manufacturer
Silicon Laboratories
Datasheet
1.C8051F410.pdf
(270 pages)
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25.2.2. Software Timer (Compare) Mode
In Software Timer mode, the PCA counter/timer value is compared to the module's 16-bit capture/compare
register (PCA0CPHn and PCA0CPLn). When a match occurs, the Capture/Compare Flag (CCFn) in
PCA0CN is set to logic 1 and an interrupt request is generated if CCF interrupts are enabled. The CCFn bit
is not automatically cleared by hardware when the CPU vectors to the interrupt service routine, and must
be cleared by software. Setting the ECOMn and MATn bits in the PCA0CPMn register enables Software
Timer mode.
Important Note About Capture/Compare Registers : When writing a 16-bit value to the PCA0 Cap-
ture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to ‘0’; writing to PCA0CPHn sets ECOMn to ‘1’.
PCA0CPLn
Write to
Reset
PCA0CPHn
Write to
0
1
ENB
ENB
Figure 25.5. PCA Software Timer Mode Diagram
W
M
P
1
6
n
x
C
O
M
E
n
PCA0CPMn
C
A
P
P
n
0 0
C
A
P
N
n
M
A
T
n
O
G
T
n
0 0
W
P
M
n
E
C
C
F
n
x
Enable
PCA
Timebase
Rev. 1.0
PCA0CPLn
PCA0L
16-bit Comparator
PCA0CPHn
PCA0H
C8051F410/1/2/3
Match
C
F
C
R
0
1
PCA0CN
C
C
F
5
C
C
F
4
C
C
F
3
C
C
F
2
PCA
Interrupt
C
C
F
1
C
C
F
0
253
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