bd91361muv ROHM Co. Ltd., bd91361muv Datasheet - Page 7

• Manufacturer Part Number: bd91361muv
• Description: Single-chip Type With Built-in Fet Switching Regulators
• Manufacturer: ROHM Co. Ltd.

●Operation
BD91361MUV
© 2010 ROHM Co., Ltd. All rights reserved.
www.rohm.com
Current
RESET
Comp
V
SET
BD91361MUV is a synchronous rectifying step-down switching regulator that achieves faster transient response by
employing current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode for
heavier load, while it utilizes SLLM (Simple Light Load Mode) operation for lighter load to improve efficiency.
○Synchronous rectifier
○Current mode PWM control
SW
OUT
I
It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC,
and its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power
dissipation of the set is reduced.
Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback.
・PWM (Pulse Width Modulation) control
・SLLM
L
The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a highside MOS FET (while a lowside
MOS FET is turned OFF), and an inductor current I
signals, a current feedback control signal (SENSE: Voltage converted from I
(FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the highside MOS FET
(while a lowside MOS FET is turned ON) for the rest of the fixed period. The PWM control repeat this operation.
When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching pulse
is designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation without
voltage drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa.
Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current
Comp, it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching is
tuned OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces the
switching dissipation and improves the efficiency.
TM
Fig.24 PWM switching timing chart
(Simple Light Load Mode) control
V
OUT
Gm Amp.
Fig.23 Diagram of current mode PWM control
Level
Shift
ITH
FB
SENSE
Current
Comp
PVCC
GND
GND
GND
I
V
L
OUT
(AVE)
RESET
(AVE)
OSC
FB
SET
SENSE
L
7/17
increases. The current comparator (Current Comp) receives two
R Q
S
Current
RESET
Comp
V
SET
SW
OUT
Driver
Logic
I
L
Fig.25 SLLM
SW
L
) and a voltage feedback control signal
I
L
Not switching
TM
switching timing chart
Load
Technical Note
2010.06 - Rev.A
V
OUT
FB
PVCC
SENSE
GND
GND
GND
0A
V
OUT
(AVE)