tc9446fg TOSHIBA Semiconductor CORPORATION, tc9446fg Datasheet - Page 19

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tc9446fg

Manufacturer Part Number
tc9446fg
Description
Audio Digital Processor For Decode Of Dolby Digital Ac-3 , Mpeg2 Audio
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
3)
Read of 24 bit data
set up and R/W bit is set to “L”, when reading data of TC9446FG from a MCU during program
operation is set up.
about 6 ms, and it transmits with START Condition. Then, 24 bit data of the required number of
words is read.
added to last 8 bit data to “H”.
can transmit STOP Condition.
which should be read to data buffer of TC9446FG.
The number of words of data read while data required for the 16 bit address in a 24 bit command is
And, after transmitting a 24 bit command, I
Although ACK bit of a data Read term needs to give “L” from a MCU, it needs to set only ACK bit
This is because the Basra in of SDA where TC9446FG are the master is opened wide and a MCU
In addition, the term progress for about 6 ms after command transmission is for waiting to set data
The procedure of read-out of 24 bit data is shown in Figure 13.
Transmission of I
Transmission of I
A term is stood by for about 6 ms.
Transmission of 24 bit command
Figure 13 Procedure of Read-Out of 24 Bit Data
It finished to read of the data
Checking of ACK bit = “L”
Checking of ACK bit = “L”
(read of data = xxxx1xh)
Read of 24 bit data (1)
Read of 24 bit data (2)
Read of 24 bit data (n)
START Condition
START Condition
STOP Condition
2
2
C Address (3Ah)
C Address (3Bh)
19
2
C Address is set to 3Bh after the term progress for
At the time of ACK = “H”, it resumes from
START Condition.
A 16 bit address and a transmission word
number are set up.
At the time of ACK = “H”, it resumes from
START Condition.
It is possible to Write in the 24 bit data
until 16 word maximum.
The last ACK bit is set to “H”.
TC9446FG
2005-09-28

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