emc1428 Standard Microsystems Corp., emc1428 Datasheet - Page 37

• Manufacturer Part Number: emc1428
• Description: 1 Degree C Multiple Temperature Sensor With Hw Thermal Shutdown
• Manufacturer: Standard Microsystems Corp.

ADDR
1Fh
ADDR.
1°C Multiple Temperature Sensor with HW Thermal Shutdown & Hottest of Thermal Zones
Datasheet
SMSC EMC1428
5.13
5.14
22h
R/W
R/W
REGISTER
R/W
R/W
Channel Interrupt Mask Register
Consecutive ALERT Register
Channel
Mask
The Channel Interrupt Mask Register controls individual channel masking. When a channel is masked,
the ALERT pin will not be asserted when the masked channel reads a diode fault or out of limit error.
The channel mask does not mask the SYS_SHDN pin.
Bits 7-4 - Ex_MSK - Prevents the ALERT pin from being asserted when the External Diode X channel
is out of limit or reports a diode fault. If the EXT6_APD bit is not set (see
EXT7_MSK bit is ignored. Likewise, if the EXT4_APD bit is not set, then the EXT5_MSK bit is ignored.
Bits 3-1- Ex_MSK - Prevents the ALERT pin from being asserted when the External Diode X channel
is out of limit or reports a diode fault. If the EXT2_APD bit is not set (see
EXT3_MSK bit is ignored.
Bit 0 - INT_MSK- Prevents the ALERT pin from being asserted when the Internal Diode temperature
is out of limit.
The Consecutive ALERT Register determines how many times an out-of-limit error or diode fault must
be detected in consecutive measurements before the interrupt status registers are asserted.
Each out of limit error and diode fault condition has its own counter associated with it. Each counter
is incremented whenever the corresponding channel exceeds the appropriate limit. Additionally, each
counter is reset if the condition has been removed. (i.e. if External Diode 1 exceeds its high limit, it
will increment the high counter. If, on the next measurement, it experiences a diode fault, the high limit
counter will be reset and the diode fault counter will be incremented).
‘0’ - The External Diode X channel will cause the ALERT pin to be asserted if it is out of limit or
reports a diode fault.
‘1’ (default) - The External Diode X channel will not cause the ALERT pin to be asserted if it is out
of limit or reports a diode fault.
‘0’ - (default) The External Diode X channel will cause the ALERT pin to be asserted if it is out of
limit or reports a diode fault.
‘1’ - The External Diode X channel will not cause the ALERT pin to be asserted if it is out of limit
or reports a diode fault.
‘0’ (default) - The Internal Diode channel will cause the ALERT pin to be asserted if it is out of limit.
‘1’ - The Internal Diode channel will not cause the ALERT pin to be asserted if it is out of limit.
Consecutive
REGISTER
ALERT
MSK
E7_
B7
Table 5.16 Channel Interrupt Mask Register
TIME
OUT
Table 5.17 Consecutive ALERT Register
B7
MSK
E6_
B6
CTHE
RM2
B6
DATASHEET
MSK
E5_
B5
CTHE
RM1
B5
37
MSK
E4_
B4
CTHE
RM0
B4
MSK
E3_
B3
CAL
RT2
B3
CAL
RT1
MSK
E2_
B2
B2
CAL
RT0
B1
MSK
E1_
B1
Section
Section
Revision 0.68 (07-08-08)
B0
-
5.23), then the
5.23), then the
INT_
MSK
B0
DEFAULT
70h
DEFAULT
F0h