lm95221cimm-eng National Semiconductor Corporation, lm95221cimm-eng Datasheet - Page 15

• Manufacturer Part Number: lm95221cimm-eng
• Description: Dual Remote Diode Digital Temperature Sensor With Smbus Interface
• Manufacturer: National Semiconductor Corporation

3.0 Applications Hints
3.1.2 Compensating for Diode Non-Ideality
In order to compensate for the errors introduced by non-
ideality, the temperature sensor is calibrated for a particular
processor. National Semiconductor temperature sensors are
always calibrated to the typical non-ideality of a given pro-
cessor type. The LM95221 is calibrated for a non-ideality of
1.008 and a series resistance of 2.7Ω. When a temperature
sensor calibrated for a particular processor type is used with
a different processor type or a given processor type has a
non-ideality that strays from the typical, errors are intro-
duced.
Temperature errors associated with non-ideality may be re-
duced in a specific temperature range of concern through
use of an offset calibration accomplished through software.
Please send an email to hardware.monitor.team
requesting further information on our recommended offset
value for different processor types.
3.2 PCB LAYOUT FOR MINIMIZING NOISE
In a noisy environment, such as a processor mother board,
layout considerations are very critical. Noise induced on
traces running between the remote temperature diode sen-
sor and the LM95221 can cause temperature conversion
errors. Keep in mind that the signal level the LM95221 is
trying to measure is in microvolts. The following guidelines
should be followed:
1. V
2. A 2.2nF diode bypass capacitor is required to filter high
allel with 100pF. The 100pF capacitor should be placed
as close as possible to the power supply pin. A bulk
capacitance of approximately 10µF needs to be in the
near vicinity of the LM95221.
frequency noise. Place the 2.2nF capacitor as close as
DD
should be bypassed with a 0.1µF capacitor in par-
FIGURE 4. Ideal Diode Trace Layout
(Continued)
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3. Ideally, the LM95221 should be placed within 10cm of
4. Diode traces should be surrounded by a GND guard ring
5. Avoid routing diode traces in close proximity to power
6. Avoid running diode traces close to or parallel to high
7. If it is necessary to cross high speed digital traces, the
8. The ideal place to connect the LM95221’s GND pin is as
9. Leakage current between D+ and GND and between D+
Noise coupling into the digital lines greater than 400mVp-p
(typical hysteresis) and undershoot less than 500mV below
GND, may prevent successful SMBus communication with
the LM95221. SMBus no acknowledge is the most common
symptom, causing unnecessary traffic on the bus. Although
the SMBus maximum frequency of communication is rather
low (100kHz max), care still needs to be taken to ensure
proper termination within a system with multiple parts on the
bus and long printed circuit board traces. An RC lowpass
filter with a 3db corner frequency of about 40MHz is included
on the LM95221’s SMBCLK input. Additional resistance can
be added in series with the SMBDAT and SMBCLK lines to
further help filter noise and ringing. Minimize noise coupling
by keeping digital traces out of switching power supply areas
as well as ensuring that digital lines containing high speed
data communications cross at right angles to the SMBDAT
and SMBCLK lines.
possible to the LM95221’s D+ and D− pins. Make sure
the traces to the 2.2nF capacitor are matched.
the Processor diode pins with the traces being as
straight, short and identical as possible. Trace resis-
tance of 1Ω can cause as much as 1˚C of error. This
error can be compensated by using simple software
offset compensation.
to either side, above and below if possible. This GND
guard should not be between the D+ and D− lines. In the
event that noise does couple to the diode lines it would
be ideal if it is coupled common mode. That is equally to
the D+ and D− lines.
supply switching or filtering inductors.
speed digital and bus lines. Diode traces should be kept
at least 2cm apart from the high speed digital traces.
diode traces and the high speed digital traces should
cross at a 90 degree angle.
close as possible to the Processors GND associated
with the sense diode.
and D− should be kept to a minimum. Thirteen nano-
amperes of leakage can cause as much as 0.2˚C of
error in the diode temperature reading. Keeping the
printed circuit board as clean as possible will minimize
leakage current.
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