W83627G Winbond Electronics Corp America, W83627G Datasheet - Page 95

• Manufacturer Part Number: W83627G
• Description: LPC Interface I/O plus Game Port, MIDI Port, Pb-free package
• Manufacturer: Winbond Electronics Corp America

9.4
CR30 （Default 0x01 if PNPCVS = 0 during POR, default 0x00 otherwise）
CR60, CR 61 （Default 0x03, 0x78 if PNPCVS = 0 during POR, default 0x00, 0x00 otherwise）
CR70 （Default 0x07 if PNPCVS = 0 during POR, default 0x00 otherwise）
CR74 （Default 0x04）
DTYPE0
These two registers select Parallel Port I/O base address.
[0x100：0xFFC] on 4 byte boundary（EPP not supported）or [0x100：0xFF8] on 8 byte bounda
（all modes supported, EPP is only available when the base address is on 8 byte boundary）.
0
0
1
1
7 - 1
7 - 4
3 - 0
7 - 3
2 - 0
BIT
BIT
BIT
0
Logical Device 1 （Parallel Port）
Reserved.
Logic device activation control
1： Active
0： Inactived
Reserved.
These bits select IRQ resource for Parallel Port.
Reserved.
These bits select DRQ resource for Parallel Port.
000： DMA0
001： DMA1
010： DMA2
011： DMA3
100 ~ 111： No DMA active
DTYPE1 DRVDEN0（pin 1） DRVDEN1（pin 2）
0
1
0
1
SELDEN
DRATE1
SELDEN
DRATE0
TABLE B
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DESCRIPTION
DESCRIPTION
DESCRIPTION
DRATE0
DRATE0
DRATE0
DRATE1
W83627HF/ F/ HG/ G
Publication Release Date: June 09, 2006
4/2/1 MB 3.5”“
2/1 MB 5.25”
2/1.6/1 MB 3.5” （3-MODE）
DRIVE TYPE
Revision 2.27