W83301DR Winbond Electronics Corp America, W83301DR Datasheet
W83301DR
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W83301DR Summary of contents
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... Winbond ACPI-STR Controller W83301DR-O Date: 2002/07 Revision: 1.0 ...
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... Winbond customers using or selling these products for use in such applications their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales. W83301DR-O Data Sheet Revision History Version on Web st 1 ...
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... W83301DR-O integrates a charge- pump engine into the chip to provide higher driving voltage to drive single N-channel MOSFETs. The W83301DR-O also offers PWOK and over current detection to protect each output and soft-start protects all linear controllers from rush current attack. The W83301DR-O is available in a 24-pin TSSOP package ...
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... W83301DR-O Pin Configuration Reserved DRV BT 3 SEN BT 4 SINK Reserved 5 Vss ChrPmp DLEN V 12 SET3 Reserved 24 STR1 23 STR1 PWOK 20 inbond 3V 19 W83301DR S3 S5 W83301DR-O DRV SEN /5V DRV DRV DLSB ...
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... STR1 Drive. Connect this pin to the gate of a suitable N-channel MOSFET for STR1 23 DRV driving STR1 output. Reserved Pin Reserved 24 FUNCTION . Input 5V supply voltage output. Pull-up internally / Soft starting avoids too much rush current during voltage setup W83301DR-O . Publication Release Date: Jul., 2002 Revision 1.0 ...
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... W83301DR-O Dual-Layout with W83301R/W83301DR 3. MOSFET 1.25V STR MOSFET 2200uF 1.5k C8 100uF V SET3 U1 1 Reserved Reserved STR DRV DRV1 3 BT STR SEN SEN1 4 BT SINK 5 Reserved PWOK /5V SS DRV DLSB 8 C1 VSET0/3V ...
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... Internal Block Diagram /5V DRV DRV 5V DLSB 3V DLSB 3V SBSEN +5VSB VSET2 5VSB Monitor and Control +5VSB 5V VSET3 S3# S5# 5 W83301DR ChrPmp POWMOS Drivers Charge Pump 1.26V # GND DLEN Publication Release Date: Jul., 2002 To STR1 DRV STR1 SEN BT DRV BT SEN BT Sink Revision 1.0 ...
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... S0 (Full-Power State), S3 (Sleeping State-Suspend to RAM), S5 and all of the state changes to the other according to the value of S3#, S5# and 5V On the other hand, cause of the W83301DR-O allows the user to disable/enable the 5V output in S5 state via the state. Besides, a soft ramp-up mechanism is needed to protect the 5V ...
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... Power OK The W83301DR-O use a bi-direction Power OK signal to ensure the system can work normally. When the system jump from the state S3 to the state S0, the W83301DR-O will monitor the input signal from PWOK pin to ensure that external system power is OK and then will switches each outputs into the S0 state; In the other hand, the W83301DR-O will pulls down the Power OK signal to inform the system a over current and induce under- voltage occurred ...
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... Pin# 8,11,12,13,14,15,16,20 Storage Temperature Ambient Temperature Operating Temperature Symbol Min Typ Max I 6 5VSB 4.3 1 8.5 1 Iss W83301DR-O Rating - 12.0 V GND-0 Chr-Pmp 0.3V GND-0 Vcc + 0.3V - 65° 150°C - 55° 125°C 0° 70°C Units Test Conditions > 8.5V ...
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... W83301DR-O Test Conditions V Vset2=0V; Vset3=0V V Vset2=5V; Vset3=0V V Vset2=0V; Vset3=5V V Vset2=5V; Vset3= (STR1 ) < 0.1mA DRV The output is always % the 50% of STR1 % Cload=3000p mA Cload=3000p uA Cload=3000p Cload=3000p mA Cload=3000p uA Cload=3000p Cload=3000p ...
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... Package Dimension 24-TSSOP 173mil 10 Publication Release Date: Jul., 2002 W83301DR-O Revision 1.0 ...
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... How to Read the Top Marking inbond W83301DR-O 1060B11039050-21NA 1st line: Winbond logo 2nd line: W83301DR-O – the part number 3rd line: Tracking code Tracking code 106 1039050-21NA 106: packages made in Year 01’, week 6 O: assembly house ID; O means OSE, G means GR, … B: the IC version ...