ncv8925 ON Semiconductor, ncv8925 Datasheet - Page 9

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ncv8925

Manufacturer Part Number
ncv8925
Description
3 Mhz, 600 Ma Step-down Dc-dc Converter
Manufacturer
ON Semiconductor
Datasheet
Detailed Description
step-down architecture. Both the main (P-Channel
MOSFET) and synchronous (N-Channel MOSFET)
switches are internal.
in the range of 0.9 V to 3.3 V and can source at least
600 mA.
PWM/PFM depending on the current required. In PWM
mode, the device can supply voltage with a tolerance of
"3% and 90% efficiency or better. Lighter load currents
cause the device to automatically switch into PFM mode to
reduce current consumption and extended battery life.
protection, current overload protection, and thermal
shutdown protection. As shown in Figure 2, only six
external components are required. The part uses an internal
reference voltage of 0.6 V. It is recommended to keep
NCV8925 in shutdown mode until the input voltage is
2.7 V or higher.
PWM Operating Mode
by modulating the on-time pulse width of the main switch
Q1 at a fixed 3 MHz frequency.
flip-flop driven by the internal oscillator and a comparator
that compares the error signal from an error amplifier with
the sum of the sensed current signal and compensation
ramp.
turned ON by the rising edge of the internal oscillator
clock. The inductor current ramps up until the sum of the
current sense signal and compensation ramp becomes
higher than the error amplifier's voltage. Once this has
occurred, the PWM comparator resets the flip-flop, Q1 is
turned OFF while the synchronous switch Q2 is turned ON.
Q2 replaces the external Schottky diode to reduce the
conduction loss and improve the efficiency. To avoid
overall power loss, a certain amount of dead time is
introduced to ensure Q1 is completely turned OFF before
Q2 is being turned ON.
The NCV8925 uses a constant frequency, voltage mode
The output voltage is set by an external resistor divider
The NCV8925 works with two modes of operation;
Additional features include soft-start, undervoltage
In this mode, the output voltage of the device is regulated
The switching of the PMOS Q1 is controlled by a
At the beginning of each cycle, the main switch Q1 is
DC/DC OPERATION DESCRIPTION
http://onsemi.com
NCV8925
9
PFM Operating Mode
current
consumption. The output regulation is implemented by
pulse frequency modulation. If the output voltage drops
below the threshold of PFM comparator, a new cycle will
be initiated by the PFM comparator to turn on the switch
Q1. Q1 remains ON during the minimum on time of the
structure while Q2 is in its current source mode. The peak
inductor current depends upon the drop between input and
output voltage. After a short dead time delay where Q1 is
switched OFF, Q2 is turned in its ON state. The negative
current detector will detect when the inductor current drops
below zero and sends the signal to turn Q2 to current source
mode to prevent a too large deregulation of the output
voltage. When the output voltage falls below the threshold
of the PFM comparator, a new cycle starts immediately.
(V
Under light load conditions, the NCV8925 enters in low
IN
V
V
= 3.6 V, V
Lx
V
out
I
(V
Lx
OUT
V
Figure 27. PFM Switching Waveforms
Figure 26. PWM Switching Waveform
PFM
IN
Lx
100 mA/div
10 mV/div
2 V/div
= 3.6 V, V
OUT
mode
= 1.2 V, I
OUT
200 ns/div
operation
= 1.2 V, I
OUT
= 0 mA, Temp = 255C)
OUT
to
= 600 mA)
reduce
power

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