aoz1915 Alpha & Omega Semiconductor, aoz1915 Datasheet - Page 9

• Manufacturer Part Number: aoz1915
• Description: 1.5a General Purpose Boost Regulator
• Manufacturer: Alpha & Omega Semiconductor

frequency, input and output voltage. The output ripple
voltage calculation can be simplified to:
Output capacitor with the range of 4.7µF to 22µF ceramic
capacitor usually can meet most applications.
Loop Compensation
The AOZ1915 employs peak current mode control for
easy use and fast transient response. Peak current mode
control eliminates the double pole effect of the output
L&C filter. It greatly simplifies the compensation loop
design.
With peak current mode control, the boost power stage
can be simplified to be a one-pole, one left plane zero
and one right half plane (RHP) system in frequency
domain. The pole is dominant pole and can be
calculated by:
The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
where;
C
R
ESR
The RHP zero has the effect of a zero in the gain causing
an imposed +20dB/decade on the roll off, but has the
effect of a pole in the phase, subtracting 90° in the
phase. The RHP zero can be calculated by
The RHP zero obviously can cause the instable issue if
the bandwidth is higher. It is recommended to design
the bandwidth to lower than the one half frequency of
RHP zero.
The compensation design is actually to shape the
converter close loop transfer function to get desired gain
f
f
P1
O
L
Z1
Rev. 1.1 July 2009
is load resistor value, and
is the output filter capacitor,
CO
=
=
is the equivalent series resistance of output capacitor.
---------------------------------- -
2π
------------------------------------------------
2π C
×
×
C
ΔV
1
O
O
O
1
×
×
R
ESR
=
L
I
L
CO
×
⎛
⎜
⎝
----------------------------- -
1
f C
–
×
-------------- -
V
V
OUT
IN
O
⎞
⎟
⎠
www.aosmd.com
and phase. Several different types of compensation
network can be used for AOZ1915. For most cases, a
series capacitor and resistor network connected to the
COMP pin sets the pole-zero and is adequate for a stable
high-bandwidth control loop.
In the AOZ1915, FB pin and COMP pin are the inverting
input and the output of internal transconductance error
amplifier. A series R and C compensation network
connected to COMP provides one pole and one zero.
The pole is:
where;
G
A/V,
G
C
The zero given by the external compensation network,
capacitor C
(R
Figure 1), is located at:
Choosing the suitable C
and bandwidth.
Thermal Management and Layout
Consideration
In the AOZ1915 boost regulator circuit, high pulsing
current flows through two circuit loops. The first loop
starts from the input capacitors, to the filter inductor, to
the LX pin, to the internal NMOS switch, to the ground
and back to the input capacitor, when the switch turns on.
The second loop starts from input capacitor, to the filter
inductor, to the LX pin to the internal diode, to the ground
and back to the input capacitor, when the switch is off.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is recommended to connect input capacitor, output
capacitor, and GND pin of the AOZ1915.
In the AOZ1915 boost regulator circuit, the three major
power dissipating components are the AOZ1915 and
output inductor. The total power dissipation of converter
circuit can be measured by input power minus output
power.
f
f
P
P2
EA
VEA
C
Z2
3
total_loss
is compensation capacitor.
in
is the error amplifier transconductance, which is 200 x 10
=
=
is the error amplifier voltage gain, which is 340 V/V, and
------------------------------------------ -
2π
-----------------------------------
2π
×
C
×
(C
=
C
C
G
1
C
C
3
V
EA
×
in Figure 1) and resistor R
×
IN
R
G
×
C
VEA
I
IN
C
and R
–
V
O
C
×
by trading-off stability
I
O
AOZ1915
C
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