aoz1232-01 Alpha & Omega Semiconductor, aoz1232-01 Datasheet - Page 4

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aoz1232-01

Manufacturer Part Number
aoz1232-01
Description
28v/6a Synchronous Ezbucktm Regulator
Manufacturer
Alpha & Omega Semiconductor
Datasheet
Pin Configuration
Pin Description
12, 13, 14, 15, 16,
Rev. 1.0 October 2011
20, 21, 22, 23,
Pin Number
17, 18, 19, 26
8, 9, 10, 11
24, 25
4, 29
27
28
30
1
2
3
5
6
7
Pin Name
PGOOD
AGND
PGND
PFM
TON
VCC
BST
AIN
EN
SS
FB
LX
IN
PGOOD
AGND
PFM
TON
AIN
Power Good Signal Output. PGOOD is an open-drain output used to indicate the status
of the output voltage. It is internally pulled low when the output voltage is 10% lower than
the nominal regulation voltage for 50µs (typical time) or 15% higher than the nominal
regulation voltage. PGOOD is pulled low during soft-start and shut down.
Enable Input. The AOZ1232-01 is enabled when EN is pulled high. The device shuts
down when EN is pulled low.
PFM Selection Input. Connect PFM pin to VCC/VIN for forced PWM operation. Connect
PFM pin to ground for PFM operation to improve light load efficiency.
Analog Ground.
Feedback Input. Adjust the output voltage with a resistive voltage-divider between the
regulator’s output and AGND.
On-Time Setting Input. Connect a resistor between VIN and TON to set the on time.
Supply Input for analog functions.
Supply Input. IN is the regulator input. All IN pins must be connected together.
Power Ground.
Switching Node.
Bootstrap Capacitor Connection. The AOZ1232-01 includes an internal bootstrap diode.
Connect an external capacitor between BST and LX as shown in Figure 1.
Output for internal linear regulator. Bypass VCC to AGND with a 1µF ceramic capacitor.
Place the capacitor close to VCC pin.
Soft-Start Time Setting Pin. Connect a capacitor between SS and AGND to set the
soft-start time.
EN
FB
1
2
3
4
5
6
7
30
8
30-Pin 5mm x 5mm QFN
29
AGND
9
www.aosmd.com
IN
28
10
(Top View)
27
11
26
25
12
LX
Pin Function
24
13
23
14
22
21
20
19
18
17
16
15
LX
LX
LX
PGND
PGND
PGND
PGND
PGND
AOZ1232-01
Page 4 of 18

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