r2j20658bnp Renesas Electronics Corporation., r2j20658bnp Datasheet - Page 2

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r2j20658bnp

Manufacturer Part Number
r2j20658bnp
Description
Integrated Driver - Mos Fet Drmos
Manufacturer
Renesas Electronics Corporation.
Datasheet

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R2J20658BNP
Block Diagram
LSDBL#
Notes: 1. Truth table for the DISBL# pin
R07DS0550EJ0101 Rev.1.01
Sep 30, 2011
DISBL#
THWN
PWM
3. Output signal from the UVL block
5. Truth table for the THDN block
"L"
"Open"
"H"
< 150°C
> 150°C
UVL output
Logic Level
DISBL# Input
Driver IC Temp.
CGND
Input Logic
(TTL Level)
(3 state in)
CGND
Reg5V
THWN
160 k
CGND
2 μA
Reg5V
"H"
"L"
For shutdown
Shutdown (GL, GH = "L")
Shutdown (GL, GH = "L")
Enable (GL, GH = "Active")
THDN
Enable (GL, GH = "Active")
Shutdown (GL, GH = "L")
(latch-off)
3 state signal
Driver Chip Status
Driver Chip Status
VL
Supervisor
VCIN
UVL
VH
Reg5V
For active
Level Shifter
Reg5V
Overlap
Protection.
& Logic
VCIN
Boot
SW
BOOT
Reg5V
35 k
2. Truth table for the LSDBL# pin
4. Output signal from the THWN block
3 state signal
"L"
"Open"
or "H"
Thermal Warning
Logic Level
LSDBL#
GH
Zero
Current
Det.
20 k
GL
Input
Driver Chip
*
"L" or "H"
"Open"
or "Mid"
"H"
"L"
PWM
Input
Normal
operating
"L"
"Continuous
Conduction Mode"
"Zero Current
Detection" Mode
TwarnL
GL Status
TwarnH
VIN
VSWH
PGND
Preliminary
Page 2 of 15
Thermal
Warning
High-side
MOS FET
Low-side
MOS FET
T
IC
(°C)

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