mic9130 Micrel Semiconductor, mic9130 Datasheet - Page 12
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mic9130
Manufacturer Part Number
mic9130
Description
High-voltage, High-speed Telecom Dc-to-dc Controller
Manufacturer
Micrel Semiconductor
Datasheet
1.MIC9130.pdf
(19 pages)
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MIC9130
The timing capacitor, C
temperature stable film capacitor. Care must be taken when
using capacitor values less than 47pF. The high impedance of
a small value capacitor makes the OSC pin more susceptible
to switching noise. Also, the input capacitance of the OSC pin
and the stray capacitance of the board will have a noticeable
effect on the oscillator frequency.
Higher Switching Frequencies
The MIC9130 is capable of very high switching frequencies.
One of the limitations on the maximum frequency is the cur-
rent capability of the 5V regulator supplying the oscillator
and V
linear regulator much higher switching frequencies can be
achieved. A simple way of using an external current source
is to set an NPN as an emitter follower. Figure 5b shows the
MIC9130 oscillator frequency set to 4MHz using an external
NPN. The emitter followerj circuit allows the current to be
supplied by V
drop below V
temperature and voltage variations.
M9999-040805
C
R
OSC
OSC
BIAS
Where t
f
T
f
VBIAS
SYNC
S
S OUTPU
P_OSCILLATOR
OSC
_
_
. By powering V
OSCILLATOR
5
9
4
BIAS
CC
t
ON
DELAY
while the voltage is regulated to a diode
=
. This configuration is quite stable over
11
4
1
t
3V
PERIOD
AGND
=
×
= 75ns
=
OSC
t
f
T
S OSCILLATOR
CHARGE
Figure 5a
P
_
BIAS
_
, should be an NPO ceramic or a
OSCILLATOR
1-shot
75ns
1
with an external source, e.g.
+
t
DISCHARGE
+
t
DELAY
V
Gate Drive
(pin 16)
OSC
12
Oscillator Synchronization
The switching frequency of the MIC9130 can be synchronized
to an external oscillator or frequency source. Figure 6 shows
the relationship between the sync input, oscillator waveform
and gate drive output. The external frequency should be set
at least 15% greater than the free running oscillator frequency
to account for tolerances in the oscillator circuit and external
components. The positive edge of the sync signal resets the
oscillator. The sync pulse frequency, like the oscillator, is twice
the gate drive frequency. When an external sync signal is
applied, the peak amplitude of the oscillator signal (pin 4) is
less than when it is free running because the oscillator signal
is terminated before it reaches its 3V (typical) amplitude.
When not used, the sync pin should be connected to ground
to prevent noise from erroneously resetting the oscillator.
Soft Start Circuit
The soft start is programmed by a capacitor on the soft start
pin. A 4µA current source charges up the capacitor. At power
up, the SS pin is discharged. Once the UVLO and enable
functions release the soft start circuit, the voltage of the ca-
pacitor increases. The active voltage range of the soft start
pin is from typically from 0.9V to 1.7V. The internal current
source increases the voltage on the soft start capacitor to
approximately 4V. The soft start pin and the current sense
voltage are connected to a comparator in tç
PMIC9130. The voltage from the soft start pin effectively
limits the peak current through the current sense resistor by
prematurely terminating the on-time of the gate drive output.
Referring to Figure 1, with the soft start voltage low, the duty
cycle of the output is at a minimum. As the soft start voltage
increases, the duty cycle of the gate drive output increases
4.7µF
2N3904
R
1.6k
C
33pF
OSC
1µF
OSC
Figure 6. Sync Waveform
4.7µF
VBIAS
AGND
SYNC
OSC
VCC
Figure 5b
2
5
9
4
11
TIME (500ns/div)
3V
1-shot
75ns
Micrel, Inc.
April 2005