hip6020 Intersil Corporation, hip6020 Datasheet - Page 11

• Manufacturer Part Number: hip6020
• Description: Advanced Dual Pwm And Dual Linear Power Controller
• Manufacturer: Intersil Corporation

The modulator transfer function is the small-signal transfer
function of V
Gain, given by V
a double pole break frequency at F
Modulator Break Frequency Equations
The compensation network consists of the error amplifier
(internal to the HIP6020) and the impedance networks Z
Z
closed loop transfer function with high 0dB crossing frequency
(f
difference between the closed loop phase at f
degrees The equations below relate the compensation
network’s poles, zeros and gain to the components (R1, R2,
R3, C1, C2, and C3) in Figure 11. Use these guidelines for
locating the poles and zeros of the compensation network:
1. Pick Gain (R2/R1) for desired converter bandwidth
3. Place 2
4. Place 1
5. Place 2
6. Check Gain against Error Amplifier’s Open-Loop Gain
7. Estimate Phase Margin - Repeat if Necessary
2. Place 1
FB
0dB
FIGURE 8. VOLTAGE-MODE BUCK CONVERTER
F
V
. The goal of the compensation network is to provide a
LC
OSC
) and adequate phase margin. Phase margin is the
=
--------------------------------------- -
2
V
ST
ND
ST
ND
E/A
OUT
OSC
COMPENSATION DESIGN
Zero Below Filter’s Double Pole (~75% F
ERROR
AMP
Pole at the ESR Zero
DETAILED COMPENSATION COMPONENTS
L
Zero at Filter’s Double Pole
Pole at Half the Switching Frequency
1
HIP6020
IN
/V
O
/V
E/A
COMP
Z
PWM
C
+
-
COMP
OSC
FB
-
+
O
. This function is dominated by a DC
C1
REFERENCE
, and shaped by the output filter, with
C2
2-291
DACOUT
+
-
R2
DRIVER
DRIVER
Z
IN
F
ESR
LC
FB
Z
=
V
and a zero at F
FB
IN
PHASE
---------------------------------------- -
2
(PARASITIC)
C3
Z
R1
0dB
ESR C
L
IN
O
1
R3
and 180
ESR
C
V
O
OUT
O
ESR
LC
V
IN
OUT
)
and
.
HIP6020
Compensation Break Frequency Equations
Figure 12 shows an asymptotic plot of the DC-DC converter’s
gain vs. frequency. The actual Modulator Gain has a high gain
peak dependent on the quality factor (Q) of the output filter,
which is not shown in Figure 12. Using the above guidelines
should yield a Compensation Gain similar to the curve plotted.
The open loop error amplifier gain bounds the compensation
gain. Check the compensation gain at F
of the error amplifier. The Closed Loop Gain is constructed on
the log-log graph of Figure 12 by adding the Modulator Gain (in
dB) to the Compensation Gain (in dB). This is equivalent to
multiplying the modulator transfer function to the compensation
transfer function and plotting the gain.
The compensation gain uses external impedance networks
Z
loop. A stable control loop has a gain crossing with
-20dB/decade slope and a phase margin greater than
45 degrees. Include worst case component variations when
determining phase margin.
PWM2 Controller Feedback Compensation
To reduce the number of external small-signal components
required by a typical application, the standard PWM
controller is internally stabilized. The only stability criteria
that needs to be met relates the minimum value of the output
inductor to the equivalent ESR of the output capacitor bank,
as shown in the following equation:
F
F
L
FIGURE 9. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN
FB
OUT MIN
Z1
Z2
100
-20
-40
-60
80
60
40
20
0
and Z
=
=
-----------------------------------
2
------------------------------------------------------ -
2
10
MODULATOR
20
IN
log
GAIN
R2 C1
=
R1
1
to provide a stable, high bandwidth (BW) overall
ESR
------------------------------------------------
R2
------- -
R1
100
F
+
1
Z1
2
R3
OUT
F
1K
LC
C3
BW
F
10
FREQUENCY (Hz)
Z2
F
1.75
ESR
10K
F
F
F
P1
P2
P1
100K
=
=
F
------------------------------------------------------ -
2
-----------------------------------
2
P2
P2
with the capabilities
R
R3 C3
1M
1
2
ERROR AMP GAIN
COMPENSATION
1
OPEN LOOP
C1 C2
--------------------- -
C1
CLOSED LOOP
20
10M
log
GAIN
+
C2
GAIN
----------------- -
V P P
V IN
–