hip6015cb Intersil Corporation, hip6015cb Datasheet - Page 8

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hip6015cb

Manufacturer Part Number
hip6015cb
Description
Buck Pulse-width Modulator Pwm Controller And Output Voltage Monitor
Manufacturer
Intersil Corporation
Datasheet
The modulator transfer function is the small-signal transfer
function of V
Gain and the output filter (L
break frequency at F
the modulator is simply the input voltage (V
peak-to-peak oscillator voltage V
Modulator Break Frequency Equations
The compensation network consists of the error amplifier
(internal to the HIP6015) and the impedance networks Z
and Z
provide a closed loop transfer function with the highest 0dB
crossing frequency (f
Phase margin is the difference between the closed loop
phase at f
the compensation network’s poles, zeros and gain to the
components (R
these guidelines for locating the poles and zeros of the
compensation network:
F
1. Pick Gain (R
2. Place 1
3. Place 2
4. Place 1
5. Place 2
6. Check Gain against Error Amplifier’s Open-Loop Gain
7. Estimate Phase Margin - Repeat if Necessary
LC
V
FIGURE 7. VOLTAGE-MODE BUCK CONVERTER
OSC
=
FB
-------------------------------------- -
2
OSC
. The goal of the compensation network is to
0dB
COMPARATOR
ST
ERROR
ND
ST
ND
L
1
V
OUT
O
COMPENSATION DESIGN
PWM
E/A
AMP
and 180 degrees The equations below relate
Zero Below Filter’s Double Pole (~75% F
Pole at the ESR Zero
Zero at Filter’s Double Pole
Pole at Half the Switching Frequency
1
+
-
C
, R
Z
2
/V
FB
/R
O
HIP6015
+
E/A
-
2
DETAILED COMPENSATION COMPONENTS
1
, R
LC
0dB
) for desired converter bandwidth
. This function is dominated by a DC
REFERENCE
COMP
3
DRIVER
and a zero at F
, C
C
) and adequate phase margin.
1
Z
1
O
F
IN
C
, C
DACOUT
+
ESR
-
and C
2
8
R
2
2
, and C
=
OSC
V
IN
O
-------------------------------------------- -
2
PHASE
), with a double pole
.
ESR
(PARASITIC)
Z
3
ESR C
FB
) in Figure 8. Use
L
O
FB
IN
1
. The DC Gain of
C
3
) divided by the
Z
ESR
IN
R
C
O
1
O
R
3
V
OUT
LC
V
)
IN
OUT
HIP6015
Compensation Break Frequency Equations
Figure 8 shows an asymptotic plot of the DC-DC converter’s
gain vs frequency. The actual Modulator Gain has a high gain
peak due to the high Q factor of the output filter and is not
shown in Figure 8. Using the above guidelines should give a
Compensation Gain similar to the curve plotted. The open
loop error amplifier gain bounds the compensation gain.
Check the compensation gain at F
the error amplifier. The Closed Loop Gain is constructed on
the log-log graph of Figure 8 by adding the Modulator Gain (in
dB) to the Compensation Gain (in dB). This is equivalent to
multiplying the modulator transfer function to the
compensation transfer function and plotting the gain.
The compensation gain uses external impedance networks
Z
loop. A stable control loop has a gain crossing with
-20dB/decade slope and a phase margin greater than 45
degrees. Include worst case component variations when
determining phase margin.
Component Selection Guidelines
Output Capacitor Selection
An output capacitor is required to filter the output and supply
the load transient current. The filtering requirements are a
function of the switching frequency and the ripple current.
The load transient requirements are a function of the slew
rate (di/dt) and the magnitude of the transient load current.
These requirements are generally met with a mix of
capacitors and careful layout.
Modern microprocessors produce transient load rates above
1A/ns. High frequency capacitors initially supply the transient
F
F
FB
FIGURE 8. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN
Z1
Z2
100
-20
-40
-60
80
60
40
20
0
and Z
=
=
-------------------------------- -
2
--------------------------------------------------- -
2
10
(R
20LOG
2
IN
MODULATOR
/R
R
1
R
1
to provide a stable, high bandwidth (BW) overall
2
)
1
100
1
+
C
R
GAIN
1
3
1K
F
C
Z1
3
F
FREQUENCY (Hz)
LC
F
Z2
10K
F
F
F
P1
P2
P1
F
(V
ESR
P2
=
=
100K
IN
20LOG
F
/ V
---------------------------------------------------- -
2
-------------------------------- -
2
with the capabilities of
P2
OSC
OPEN LOOP
ERROR AMP GAIN
R
R
1
2
3
1M
)
COMPENSATION
GAIN
1
C
C
-------------------- -
C
3
CLOSED LOOP
GAIN
1
1
10M
+
C
C
2
2

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