hip4080ip Intersil Corporation, hip4080ip Datasheet - Page 17

• Manufacturer Part Number: hip4080ip
• Description: 80v/2.5a Peak, High Frequency Full Bridge Fet Driver
• Manufacturer: Intersil Corporation

Timing Diagrams
NOTE:
7. ALI and/or BLI may be high after t1, whereupon the ENABLE pin
ALI, BLI
may also be brought high.
V
DIS
DD
xxxxx
xxxxx
xxxxx
xxxxx
xxxxx
xxxxx
xxxxx
xxxxx
1.7V
8.5V TO 10.5V (ASSUMES 5% RESISTORS)
FIGURE 38.
12V, FINAL VALUE
HIP4080
17
NOTE:
8. Between t1 and t2 the IN+ and IN- inputs must cause the OUT pin
LDEL
to go through one complete cycle (transition order is not impor-
tant). If the ENABLE pin is low after the undervoltage circuit is
satisfied, the ENABLE pin will initiate the 10ms time delay during
which the IN+ and IN- pins must cycle at least once.
V
DIS
DD
xxxxx
xxxxx
xxxxx
xxxxx
xxxx
xxxx
xxxx
xxxxx
xxxxx
xxxxx
xxxxx
t1
=10ms
8.3V TO 9.1V (ASSUMING 5% ZENER TOLERANCE)
t2
FIGURE 39.
12V, FINAL VALUE
5.1V