lm5118mhx National Semiconductor Corporation, lm5118mhx Datasheet - Page 13

• Manufacturer Part Number: lm5118mhx
• Description: Wide Voltage Range Buck-boost Controller
• Manufacturer: National Semiconductor Corporation

3V returns the regulator to normal operation. The EN pin can
be tied directly to the VIN pin if this function is not needed. It
must not be left floating. A 1 MΩ pull-up resistor to VIN can
be used to interface with an open collector or open drain con-
trol signal.
UVLO
An under-voltage lockout pin is provided to disable the regu-
lator when the input is below the desired operating range. If
the UVLO pin is below 1.13V, the regulator enters a standby
mode with the outputs disabled, but with VCC regulator op-
erating. If the UVLO input exceeds 1.23V, the regulator will
resume normal operation. A voltage divider from the input to
ground can be used to set a VIN threshold to disable the reg-
ulator in brown-out conditions or for low input faults.
If a current limit fault exists for more than 256 clock cycles,
the regulator will enter a “hiccup” mode of current limiting and
the UVLO pin will be pulled low by an internal switch. This
switch turns off when the UVLO pin approaches ground po-
tential allowing the UVLO pin to rise. A capacitor connected
to the UVLO pin will delay the return to a normal operating
level and thereby set the off-time of the hiccup mode fault
protection. An internal 5 µA pull-up current pulls the UVLO pin
to a high state to ensure normal operation when the VIN
UVLO function is not required and the pin is left floating.
Oscillator and Sync Capability
The LM5118 oscillator frequency is set by a single external
resistor connected between the RT pin and the AGND pin.
The R
connected directly to the pins of the IC. To set a desired os-
cillator frequency (f), the necessary value for the R
can be calculated from the following equation:
The SYNC pin can be used to synchronize the internal oscil-
lator to an external clock. The external clock must be of higher
T
resistor should be located very close to the device and
FIGURE 8. Simplified Oscillator and Block Diagram with Sync I/O Circuit
T
resistor
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frequency than the free-running frequency set by the R
sistor. A clock circuit with an open drain output is the recom-
mended interface from the external clock to the SYNC pin.
The clock pulse duration should be greater than 15 ns.
Multiple LM5118 devices can be synchronized together sim-
ply by connecting the SYNC pins together. In this configura-
tion all of the devices will be synchronized to the highest
frequency device. The diagram in Figure 7 illustrates the
SYNC input/output features of the LM5118. The internal os-
cillator circuit drives the SYNC pin with a strong pull-down/
weak pull-up inverter. When the SYNC pin is pulled low, either
by the internal oscillator or an external clock, the ramp cycle
of the oscillator is terminated and forced 400 ns off-time is
initiated before a new oscillator cycle begins. If the SYNC pins
of several LM5118 IC’s are connected together, the IC with
the highest internal clock frequency will pull all the connected
SYNC pins low and terminate the oscillator ramp cycles of the
other IC’s. The LM5118 with the highest programmed clock
frequency will serve as the master and control the switching
frequency of all the devices with lower oscillator frequencies.
FIGURE 7. Sync from Multiple Devices
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