lx1673 Microsemi Corporation, lx1673 Datasheet - Page 10

• Manufacturer Part Number: lx1673
• Description: High Frequency Pwm Regulator
• Manufacturer: Microsemi Corporation

Copyright © 2004
Rev 1.0, 3/18/2005
Where R
The current required to charge the output capacitor during the soft
Taking the derivative with respect to time results in
and at t=0
The SS pin voltage can be expressed as:
O
Note: Maximum R
At higher PWM frequencies or low duty cycles where the upper
start interval is.
The required inductor current for the output capacitor to follow
the soft start voltage equals the required capacitor current plus the
load current.
provide the desired power on sequencing and insure that the
overall inductor current does not exceed its maximum allowable
rating.
Values of C
saturation of the output inductor unless very large output
capacitors are used.
detected by the current sense comparator is greater than the
current sense comparator threshold, V
R
not allow startup since I
300mV).
gate drive is less than 350nS wide the 350nS delay for current
limit enable may result in current pulses exceeding the desired
DS(ON)
VER
Current limiting occurs at current level I
So,
Example:
For 10A current limit, using FDS6670A MOSFET (
-C
R
):
SET
TM
SS
URRENT
and C
=
SS
V
equal to 0.1µf or greater are unlikely to result in
TRIP
The soft-start capacitor should be selected to
I
SS
P
CL
Iout =
Iout
R
V
ROTECTION
Im
SET
are the soft-start resistor and capacitor.
−
×
SS
SET
I
R
ax
I
CL
is
SET
=
=
DS(ON)
=
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: [phone]
×
6K . Any resistor
Cout
=
V
VrefCout
0.
R
CL
RssCss
VrefCout
ref
3
Ω
DS(ON)
RssCss
+
50
will equal zero (50µA x
−
dVss
I
(
10
SET
1
×
dt
10
−
×
×
=
e
e
0.0
−
R
−
−
3
6
TRIP
00
t/R
t/R
SET
10
SS
SS
A P P L I C A T I O N N O T E
mV
=
(300mV).
=
C
C
SS
SS
V
4
−
50
CL
6K
K
TRIP
)
I
µA
Ω
CL
when the voltage
Ω
×
or greater will
R
Integrated Products Division
DS(ON)
6K
®
10m
Microsemi
Ω
Ω
=
using the positive input of the phase 2 error amplifier RF2 as a
reference input from an external reference voltage V
defined as one half of VDDQ. Using V
will insure that all voltages are correct and track each other as
specified in the JEDEC (EIA/JESD8-9A) specification. The phase 2
output will then be equal to V
required.
error amplifier positive input and the Soft Start pin is lost and Soft
Start will not function. It is recommended that the external
reference voltage have an R-C time constant that will be long
enough to allow the output capacitor to charge slowly.
voltage (V
and receiver supply voltage (VDD).
current limit set point. If the upper MOSFET on time is less than
350nS and a short circuit condition occurs the duty cycle will
increase, since V
will be enabled when the upper gate drive exceeds 350nS although
the actual peak current limit value will be higher than calculated
with the above equation.
even though the magnitude of the current pulses will be higher than
the calculated value.
leave them floating.
pulling the disable (DIS) pin above 1.2V. There is a
down resistor on this input.
control of this output voltage. Pulling this pin above 3 V disables
the LDO. There is a
compared to a 0.8V reference. The output voltage can be set to any
voltage above 0.8V (and lower than the input voltage) by means of
a resistor divider (see Figure 1).
amplifier input current. Keep R
magnitude).
If OCP is not desired connect both VSX and VCX to VCC. Do not
O
P
DDR V
ROGRAMMING
UTPUT
Short circuit protection still exists due to the narrow pulse width
The LX1673 PWM MOSFET driver outputs are shut off by
The LDO voltage regulator has its own Disable pin (LDDIS) for
The output Voltage is sensed by the feedback pin (FB
Note: This equation is simplified and does not account for error
V
When an external reference is used the connection between the
See Microsemi Application Note 17 for more details
Double Data Rate (DDR) SDRAM requires a termination
TT
( C O N T I N U E D )
High Frequency PWM Regulator
for DDR memory can be generated with the LX1673 by
TT
D
TT
ISABLE
T
) in addition to the line driver supply voltage (VDDQ)
ERMINATION
P
RODUCTION
T
OUT
HE
100K
V
will be forced low. The current limit circuit
O
OUT
UTPUT
=
Ω
V
OLTAGE
V
pull down resistor on this input.
V
REF
REF
D
OLTAGE
1
(1
ATA
and R
and track the VDDQ supply as
+
R
S
1
/R
2
REF
HEET
close to
2
)
as the reference input
1K (order of
REF
80K
Ω
X
LX1673
) which is
which is
Ω
pull
Page 10