ncl30051 ON Semiconductor, ncl30051 Datasheet - Page 3

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ncl30051

Manufacturer Part Number
ncl30051
Description
Ncl30051 Product Preview Two Stage Pfc And Resonant Half Bridge Controller Combo For Led Lighting
Manufacturer
ON Semiconductor
Datasheet

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Table 1. PIN FUNCTION DESCRIPTION
Pin
10
12
13
14
15
16
11
1
2
3
4
5
6
7
8
9
PControl
HDRVlo
HDRVhi
HBoost
PGND
PDRV
Name
VREF
PZCD
OSC
GND
PCS
VCC
HVS
PFB
PCT
HV
This is the input of the high voltage startup regulator and connects directly to the bulk voltage. A constant cur-
rent source supplies current from this pin to the V
istor. The charge current is 7.5 mA (typical).
A capacitor on this pin adjusts the frequency of the internal oscillator. The oscillator sets the frequency of the
half−bridge controller. The half−bridge operates at half the oscillator frequency. The OSC pin also serves as a
disable input for the half−bridge stage. The half−bridge stage is disabled by pulling down this pin below its dis-
able threshold, V
Analog ground.
Reference voltage. The capacitor on this pin decouples the internal reference. A 0.1 mF capacitor needs to be
connected between this pin and ground.
PFC voltage feedback input. The voltage on this pin is compared to a 2.5 V reference (typical) to regulate the
PFC output voltage. The voltage on this pin is also used to detect PFC undervoltage and overvoltage conditions.
PFC regulator current sense input. A voltage ramp proportional to the PFC switch current is applied to this pin.
The current sense threshold, V
the current sense signal at the start of each cycle.
PFC inductor zero current detector. The inductor current is monitored using an auxiliary winding on the PFC
inductor. The PFC drive signal is enabled during a high to low transition on the PZCD pin. A series resistor limits
the current into the PZCD pin. The watchdog timer is disabled while the PZCD voltage is above the ZCD arming
threshold, V
feature can be used to disable PFC drive pulses.
PFC control voltage. This pin connects to the output of the PFC error amplifier. The error amplifier is a transcon-
ductance amplifier. A compensation network between this pin and grounds sets the PFC loop bandwidth. The
PFC control voltage is compared to a level shifted version of V
PFC on time control capacitor. A 270 mA (typical) current source charges a capacitor connected between this
pin and ground. Once the level shifted PCT voltage reaches V
PCT capacitor is discharged.
Positive input supply. This pin connects to an external capacitor for energy storage. An internal current source
supplies current from HV to this pin. Once the V
turns off and the controller is enabled. The current source turns on once V
During normal operation, power is supplied to the IC via this pin by means of an auxiliary winding.
Ground connection for PDRV and HDRVlo. Tie to the power stage return with a short trace.
PFC switch gate drive control signal. The source and sink drive capability is limited to 60 W and 15 W (typical),
respectively. A discrete driver may be needed to drive the external MOSFET.
Half−bridge low side switch gate drive control signal. The source and sink drive capability is limited to 75 W and
15 W (typical), respectively. A discrete driver may be needed to drive the half bridge switch.
Half−bridge high side driver source connection. This pin connects directly to the bridge terminal and can float up
to 600 V.
Half−bridge high side switch gate drive control signal. The source and sink drive capability is limited to 75 W and
15 W (typical), respectively. The supply terminals of the high side driver connect to the HBoost and HVS pins.
Supply voltage of the high side gate driver. A charge pump generates a bootstrap voltage floating on top of the
HVS voltage. A diode between the VCC and HBoost pins provides a charge path. The bootstrap voltage is V
minus a diode drop.
ZCD(high)
HB(DIS)
. It is re−enabled once the voltage drops below the ZCD trigger threshold, V
, typically 1.955 V.
PCS(ILIM)
http://onsemi.com
, is typically 0.84 V. A 110 ns (typical) leading edge blanking circuit filters
3
CC
CC
Description
voltage reaches V
capacitor, eliminating the need for an external startup res-
PControl
PCT
to control the PFC duty ratio.
, the PFC drive signal is disabled and the
CC(on)
CC
(15.3 V typical), the current source
falls to V
CC(off)
(9.3 V typical).
ZCD(low)
. This
CC

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