ncp391 ON Semiconductor, ncp391 Datasheet - Page 10

• Manufacturer Part Number: ncp391
• Description: Ncp391 Positive Overvoltage Protection Controller With Internal Low Ron Nmos Fet
• Manufacturer: ON Semiconductor

Undervoltage Lockout (UVLO)
device has a built−in undervoltage lockout (UVLO) circuit.
During V
disconnected from input until V
plus hysteresis, nominal. The FLAG output is tied to low as
long as V
a built−in hysteresis to provide noise immunity to transient
condition. Additional UVLO thresholds ranging from
UVLO can be manufactured. Contact your ON
Semiconductor representative for availability.
Overvoltage Lockout (OVLO)
overvoltage, the device has a built−in overvoltage lockout
(OVLO) circuit. During overvoltage condition, the output
remains disabled as long as the input voltage exceeds
typical OVLO. Additional OVLO thresholds ranging from
OVLO can be manufactured. Contact your ON
Semiconductor representative for availability.
This circuit has a built−in hysteresis to provide noise
immunity to transient
FLAG Output
external systems that a fault has occurred.
exceeded or when the V
threshold. When V
FLAG is held high, keeping in mind that an additional t
delay has been added between available output and FLAG
= high. The pin is an open drain output, thus a pull up
resistor (typically 1 MW, minimum 10 kW) must be added
to V
level will always reflects V
turned off (EN = 1).
EN Input
to low or connected to ground. A high level on the pin,
disconnects OUT pin from IN pin. EN does not overdrive
an OVLO or UVLO fault.
Internal NMOSFET
FET to protect the systems, connected on OUT pin, from
positive overvoltage. Regarding electrical characteristics,
the R
on V
As example: R
Typical R
V
out
To ensure proper operation under any conditions, the
To protect connected systems on V
FLAG output is tied to low until V
The NCP391 provides a FLAG output, which alerts
This pin is tied to low as soon the OVLO threshold is
To enable normal operation, the EN pin shall be forced
The NCP391 includes an internal Low R
bat
out
= 8 x 0.615 = 4.926 V
DS(on)
. Minimum V
pin.
in
DS(on)
in
, during normal operation, will create low losses
does not reach UVLO threshold. This circuit has
positive going slope, the output remains
load
= 120 mW, I
= 8.0 W, V
in
bat
conditions.
level recovers normal condition,
supply must be 2.5 V. The FLAG
in
in
out
in
level is below the UVLO
status, even if the device is
in
= 5.0 V
= 615 mA
voltage is below UVLO,
in
is higher than OVLO.
out
DS(on)
pin from
NMOS
http://onsemi.com
start
10
NMOS losses = R
ESD Tests
1.0 mF (minimum) must be connected between V
GND, close to the device.
protected input. In Contact condition, V
ESD protected input.
electrostatic discharge waveform.
PCB Recommendations
PCB rules must be respected to properly evacuate the heat
out of the silicon.
200
180
160
140
120
100
The NCP391 input pin fully supports the IEC61000−4−2.
That means, in Air condition, V
Please refer to Figure 19 to see the IEC 61000−4−2
The NCP391 integrates a 2 A rated NMOSFET, and the
80
60
0
Figure 19. Electrostatic Discharge Waveform
100
Copper heat spreader area (mm^2)
Theta JA curve with PCB cu thk 1.0 oz
Theta JA curve with PCB cu thk 2.0 oz
Power curve with PCB cu thk 2.0 oz
Power curve with PCB cu thk 1.0 oz
200
DS(on)
Figure 20.
300
x Iout
2
400
= 0.12 x 0.615
in
has a "15 kV ESD
500
in
has "8.0 kV
600
2
= 45 mW
700
in
1.75
1.5
1.25
1
0.75
0.5
0.25
and