el7558d Intersil Corporation, el7558d Datasheet - Page 9
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el7558d
Manufacturer Part Number
el7558d
Description
Integrated Adjustable 8 Amp Synchronous Switcher
Manufacturer
Intersil Corporation
Datasheet
1.EL7558D.pdf
(11 pages)
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Applications Information
Circuit Description
General
The EL7558D is a fixed frequency, current mode controlled
DC:DC converter with integrated N-channel power
MOSFETS and a high precision reference. The device
incorporates all of the active circuitry required to implement
a cost effective, user-programmable 8A synchronous buck
converter suitable for use in CPU power supplies. By
combining HSOP packaging technology with an efficient
synchronous switching architecture, high power outputs
(30W) can be realized without the use of externally attached
heat sinks.
Theory of Operation
The EL7558D is composed of 7 major blocks:
PWM Controller
The EL7558D regulates output voltage through the use of
current-mode controlled pulse width modulation. The three
main elements in a PWM controller are the feedback loop
and reference, a pulse width modulator whose duty cycle is
controlled by the feedback error signal, and a filter which
averages the logic level modulator output. In a step-down
(buck) converter, the feedback loop forces the time-averaged
output of the modulator to equal the desired output voltage.
Unlike pure voltage-mode control systems current-mode
control utilizes dual feedback loops to provide both output
voltage and inductor current information to the controller.
The voltage loop minimizes DC and transient errors in the
output voltage by adjusting the PWM duty-cycle in response
to changes in line or load conditions. Since the output
voltage is equal to the time-average of the modulator output
the relatively large LC time constants found in power supply
applications generally results in low bandwidth and poor
transient response. By directly monitoring changes in
inductor current via a series sense resistor the controller’s
response time is not entirely limited by the output LC filter
and can react more quickly to changes in line or load
conditions. This feed-forward characteristic also simplifies
AC loop compensation since it adds a zero to the overall
loop response. Through proper selection of the current-
feedback to voltage-feedback ratio, the overall loop response
will approach a one pole system. The resulting system offers
several advantages over traditional voltage control systems,
including simpler loop compensation, pulse by pulse current
1. PWM Controller
2. Output Voltage Mode Select
3. NMOS Power FETS and Drive Circuitry
4. Bandgap Reference
5. Oscillator
6. Temperature Sensor
7. Power Good and Power On Reset
9
EL7558D
limiting, rapid response to line variation and good load step
response.
The heart of the controller is a triple-input direct summing
comparator which sums voltage feedback, current feedback
and slope compensating ramp signals together. Slope
compensation is required to prevent system instability which
occurs in current-mode topologies operating at duty-cycles
greater than 50% and is also used to define the open-loop
gain of the overall system. The compensation ramp
amplitude is user adjustable and is set using a single
external capacitor (CSLOPE). Each comparator input is
weighted and determines the load and line regulation
characteristics of the system. Current feedback is measured
by sensing the inductor current flowing through the high-side
switch whenever it is conducting. At the beginning of each
oscillator period the high-side NMOS switch is turned on and
CSLOPE ramps positively from its reset state (VREF
potential). The comparator inputs are gated off for a
minimum period of time (LEB) after the high-side switch is
turned on to allow the system to settle. The Leading Edge
Blanking (LEB) period prevents the detection of erroneous
voltages at the comparator inputs due to switching noise.
When programming low regulator output voltages the LEB
delay will limit the maximum operating frequency of the
circuit since the LEB will result in a minimum duty-cycle
regardless of the PWM error voltage. This relationship is
shown in the performance curves. If the inductor current
exceeds the maximum current limit (I LMAX ), a secondary
over-current comparator will terminate the high-side switch.
If I LMAX has not been reached, the regulator output voltage
is then compared to the reference voltage VREF. The
resultant error voltage is summed with the current feedback
and slope compensation ramp. The high-side switch remains
on until all three comparator inputs have summed to zero, at
which time the high-side switch is turned off and the low-side
switch is turned on. In order to eliminate cross-conduction of
the high-side and low-side switches a 10ns break-before-
make delay is incorporated in the switch driver circuitry. In
the continuous mode of operation the low-side switch will
remain on until the end of the oscillator period. In order to
improve the low current efficiency of the EL7558D, a zero-
crossing comparator senses when the inductor transitions
through zero. Turning off the low-side switch at zero inductor
current prevents forward conduction through the internal
clamping diodes (LX to VSSP) when the low-side switch
turns off, reducing power dissipation. The output enable
(OUTEN) input allows the regulator output to be disabled by
an external logic control signal.
Output Voltage Mode Select
The VCC2DET multiplexes the FB1 and FB2 pins to the
PWM controller. A logic 1 on VCC2DET selects the FB2
input and forces the output voltage to the internally
programmed value of 3.50V. A logic zero on VCC2DET