lt3724 Linear Technology Corporation, lt3724 Datasheet - Page 6

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lt3724

Manufacturer Part Number
lt3724
Description
High Voltage, Current Mode Switching Regulator Controller
Manufacturer
Linear Technology Corporation
Datasheet

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PI FU CTIO S
LT3724
V
be decoupled to SGND with a low ESR capacitor located
close to the pin.
NC (Pin 2): No Connection.
SHDN (Pin 3): The SHDN pin has a precision IC enable
threshold of 1.35V (rising) with 120mV of hysteresis. It is
used to implement an undervoltage lockout (UVLO) cir-
cuit. See Application Information section for implement-
ing a UVLO function. When the SHDN pin is pulled below
a transistor V
entered, all internal circuitry is disabled and the V
current is reduced to approximately 10μA. Typical pin
input bias current is <10μA and the pin is internally
clamped to 6V.
C
supply soft-start function. The pin is connected to V
a ceramic capacitor (C
During start-up, the supply output voltage slew rate is
controlled to produce a 2μA average current through the
soft-start coupling capacitor. Use the following formula to
calculate C
See the application section for more information on set-
ting the rise time of the output voltage during start-up.
Shorting this pin to SGND disables the soft-start function.
BURST_EN (Pin 5): The BURST_EN pin is used to enable
or disable Burst Mode operation. Connect the BURST_EN
pin to ground to enable the burst mode function. Connect
the pin to V
V
externally connected to the supply output voltage via a
resistive divider. The V
inverting input of the error amplifier. In regulation, V
1.231V.
V
whose voltage corresponds to the maximum (peak) switch
current per oscillator cycle. The error amplifier is typically
configured as an integrator circuit by connecting an RC
network from the V
dominant pole for the converter regulation control loop.
Specific integrator characteristics can be configured to
6
IN
SS
FB
C
C
U
(Pin 7): The V
(Pin 1): The V
SS
(Pin 4): The soft-start pin is used to program the
(Pin 6): The output voltage feedback pin, V
= 2μA(t
U
SS
CC
BE
for a given output voltage slew rate:
SS
to disable the burst mode function.
(0.7V), a low current shutdown mode is
/V
C
IN
OUT
pin is the output of the error amplifier
C
U
pin is the main supply pin and should
pin to SGND. This circuit creates the
FB
)
SS
pin is internally connected to the
) and 200kΩ series resistor.
IN
OUT
supply
FB
FB
, is
via
is
optimize transient response. Connecting a 100pF or greater
high frequency bypass capacitor from this pin to ground
is recommended. When Burst Mode operation is enabled
(see Pin 5 description), an internal low impedance clamp
on the V
which limits the negative excursion of the pin voltage.
Therefore, this pin cannot be pulled low with a low imped-
ance source. If the V
do so through a 1kΩ series resistance.
SGND (Pin 8, 17): The SGND pin is the low noise ground
reference. It should be connected to the –V
output capacitors. Careful layout of the PCB is necessary
to keep high currents away from this SGND connection.
See the Application Information section for helpful hints
on PCB layout of grounds.
SENSE
the current sense amplifier and is connected to the V
side of the sense resistor for step-down applications. The
sensed inductor current limit is set to 150mV across the
SENSE inputs.
SENSE
the current sense amplifier and is connected to the induc-
tor side of the sense resistor for step-down applications.
The sensed inductor current limit is set to 150mV across
the SENSE inputs.
PGND (Pin 11): The PGND pin is the high-current ground
reference for internal low side switch and the V
circuit. Connect the pin directly to the negative terminal of
the V
mation section for helpful hints on PCB layout of grounds.
V
decoupling node. Use low ESR 1μF ceramic capacitor to
decouple this node to PGND. Most internal IC functions
are powered from this bias supply. An external diode
connected from V
bootstrapped capacitor during the off-time of the main
power switch. Back driving the V
voltage source, such as the V
regulator supply, increases overall efficiency and reduces
power dissipation in the IC. In shutdown mode this pin
sinks 20μA until the pin voltage is discharged to 0V.
NC (Pin 13): No Connection.
CC
(Pin 12): The V
CC
+
decoupling capacitor. See the Application Infor-
C
(Pin 10): The SENSE
(Pin 9): The SENSE
pin is set at 100mV below the burst threshold,
CC
C
pin must be externally manipulated,
CC
to the BOOST pin charges the
pin is the internal bias supply
+
pin is the negative input for
pin is the positive input for
CC
OUT
pin from an external DC
output of the buck
OUT
CC
side of the
regulator
3724fb
OUT

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