lt3740 Linear Technology Corporation, lt3740 Datasheet - Page 9

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lt3740

Manufacturer Part Number
lt3740
Description
Wide Operating Range, Valley Mode, No Rsense Synchronous Step-down Controller
Manufacturer
Linear Technology Corporation
Datasheet

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APPLICATIO S I FOR ATIO
The ρ
accounting for the significant variation in on-resistance
with temperature, typically about 0.4%/°C as shown in
Figure 1. For a maximum junction temperature of 100°C,
using a value ρ
Gate Drives
The top gate drive power is provided by BIAS which is
about 7.8V higher than V
high as 7.8V and can droop to about 5.5V if the on-time is
long enough. The bottom gate drive power is provided by
the BGDP pin. BGDP needs to be connected to 7V or higher
to get enough gate drive voltage for logic-level threshold
MOSFETs. BGDP can be connected to V
external voltage supply. For input voltages lower than 7V,
BGDP should be connected to BIAS to be able to use logic-
level threshold MOSFETs. For V
can be connected to V
gate drive. For high BGDP voltages, the internal clamp
circuit limits the bottom gate drive voltage to about 8V to
prevent the gate from overvoltage damage.
For the case BGDP is connected to V
up slowly during startup, there will be a considerable
period of time that BGDP is below 7V and the circuit is
operating. The insufficient voltage on BGDP could cause
malfunction of the circuit. One of the solution circuits is
shown in Figure 2. The Zener diode and the small MOSFET
T
term is a normalization factor (unity at 25°C)
Figure 1. MOSFET R
0.4
2.0
1.6
1.2
0.8
0
–50
T
V
I
= 1.3 is reasonable.
D
GS
–25
= 14A
T
U
J
= 10V
– JUNCTION TEMPERATURE (°C)
IN
0
to reduce power loss in the bottom
IN
U
25
. The top gate voltage can be as
DS(ON)
50
IN
75
vs. Temperature
higher than 7V, BGDP
W
IN
100 125 150
, if V
3740 F01
IN
IN
voltage ramp
, BIAS or an
U
limit the SHDN voltage to be about 6V below V
shuts down the LT3740 for V
ramp up to 7V quick enough, this circuit is not necessary.
For V
strong drive of BGATE can generate extra noise and affect
the operation. A resistor R
and the gate of the bottom MOSFET as shown in Figure 3
can effectively reduce the noise.
The LT3740 uses adaptive dead time control to prevent the
top and bottom MOSFET short-through and minimize the
dead time. When the internal top MOSFET on signal
comes, the LT3740 delays the turn on of TGATE until
BGATE is off. When the internal bottom MOSFET on signal
comes, the LT3740 delays the turn on of BGATE until the
SW node swings down to ground. In the case of small or
negative inductor current that SW node cannot swing
below ground after TGATE turns off, BGATE will turn on
200ns after TGATE is off.
MMSZ52312BS
Figure 2. Circuit That Prevents Operation for V
IN
higher than 14V, the high dv/dt at SW node and the
Figure 3. Noise Reduction for Bottom MOSFET.
100k
LT3740
2N7002TA
BGATE
PGND
BG
3740 F03
SW
IN
of 1Ω-2Ω between BGATE
lower than 7V. If V
R
BG
V
BGDP
SHDN
IN
LT3740
M2
LT3740
3740 F02
IN
< 7V
IN
IN
. This
3740fa
9
can

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