lt3500edd-trpbf Linear Technology Corporation, lt3500edd-trpbf Datasheet - Page 3

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lt3500edd-trpbf

Manufacturer Part Number
lt3500edd-trpbf
Description
Monolithic 2a Step-down Regulator Plus Linear Regulator/controller
Manufacturer
Linear Technology Corporation
Datasheet
ELECTRICAL CHARACTERISTICS
PARAMETER
SS Sink Current
SS POR Sink Current (Note 4)
SS POR Threshold
SS to FB Offset (V
PG/PG Leakage
PG/PG Threshold (Rising)
PG/PG Hysteresis (Falling)
PG Sink Current
PG Sink Current
R
Switching Frequency
SYNC Frequency Range
Minimum Switch On Time
Minimum Switch Off Time
Switch Leakage Current
Switch Saturation Voltage
Switch Peak Current
Boost Current
Minimum Boost Voltage (Note 5)
LFB Voltage
LFB Line/Load Regulation
SS to LFB Offset (V
LFB Bias Current
LDRV Dropout (V
LDRV Maximum Current
temperature range, otherwise specifi cations are at T
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note2: The LT3500EDD is guaranteed to meet performance specifi cations
from 0°C to 125°C junction temperature. Specifi cations over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3500IDD is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT3500HDD is guaranteed over the full –40°C to
150°C operating junction temperature range. High junction temperatures
degrade operating lifetimes. Operating lifetime is derated at junction
temperatures greater than 125°C.
Note 3: Minimum input voltage is defi ned as the voltage where internal
bias lines are regulated so that the reference voltage and oscillator remain
constant. Actual minimum input voltage to maintain a regulated output
T
/SYNC Reference Voltage
VIN
SS
SS
– V
– V
– V
FB
LDRV
LFB
)
)
)
CONDITIONS
V
V
V
V
V
V
V
V
V
R
R
R
V
V
V
I
V
I
I
V
V
V
V
V
V
SW
SW
SW
VC
VIN
FB
FB
FB
PG
PG
PG
PG
FB
RT/SYNC
RT/SYNC
RT/SYNC
FB
FB
SW
BST
LDRV
SS
LFB
LDRV
LDRV
= 0V, V
= 0V, V
= 0.9V, V
= 0.9V, R
= 0.7V, R
= 0.7V, R
= V
= 2A, V
= 2A, V
= 2A, V
= 0.8V, V
= 0.4V
= 0.4V
= 0.4V, V
= 0.4V, V
= 0V
= 3V to 40V, V
= 0.8V
= 18V, V
= V
= 3V, I
= 0V
FS
, V
= 90.9k
= 90.9k
= 15k
LFB
J
SS
SS
BST
BST
FB
= 25°C. V
SS
PG
LDRV
RT/SYNC
RT/SYNC
RT/SYNC
FB
FB
LDRV
FB
= 2V
= 2V, Cycle SHDN
= 0.7V
= 0.4V
/V
= 18V, V
= 20V, V
= 0.7V
= 0.9V
= 0.7V
PG
The
= 5mA
= V
LDRV
= 40V
= 15k
= 90.9k
= 90.9k
LFB
l
VIN
FB
FB
= V
denotes the specifi cations which apply over the full operating
= 0.7V
= 0.7V
= 15V, V
LFB
will depend upon output voltage and load current. See Applications
Information.
Note 4: An internal power-on reset (POR) latch is set on the positive
transition of the SHDN pin through its threshold. The output of the latch
activates a current source on the SS pin which typically sinks 600μA,
discharging the SS capacitor. The latch is reset when the SS pin is driven
below the soft-start POR threshold or the SHDN pin is taken below its
threshold.
Note 5: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
Note 6: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
when overtemperature protection is active. Continuous operation above
the specifi ed maximum operating junction temperature may impair device
reliability.
RT/SYNC
= 2V, unless otherwise specifi ed.
l
l
l
l
l
l
l
0.685
0.784
0.776
0.75
MIN
300
400
250
500
450
425
250
2.3
2.1
0.8
50
70
20
20
90
2
9
0.708
0.850
TYP
600
600
100
100
500
800
500
500
140
120
450
115
115
0.1
2.4
2.8
2.8
2.2
0.8
0.8
1.2
30
30
13
1
LT3500
0.730
0.975
0.816
0.824
1100
2500
MAX
900
800
150
120
750
550
625
140
300
2.8
3.5
3.5
1.6
40
10
45
18
1
3
UNITS
3500fa
3
MHz
kHz
kHz
kHz
mV
mV
mV
mV
mA
mV
mA
μA
μA
μA
μA
μA
μA
nA
ns
ns
V
V
A
A
V
V
V
V

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