lm5015mhx National Semiconductor Corporation, lm5015mhx Datasheet - Page 10

• Manufacturer Part Number: lm5015mhx
• Description: High Voltage Monolithic Two-switch Forward Dc-dc Regulator
• Manufacturer: National Semiconductor Corporation

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The PVIN and PGND pins are internally connected to the high
and low side power MOSFETs, respectively. When designing
the PC board, the input filter capacitor should connect directly
to these pins with short connection traces.
The VIN operating range is 4.25V to 75V. The current drawn
into the VIN pin depends primarily on the gate charge of the
internal power MOSFETs, the switching frequency, and any
external load on the VCC pin. It is recommended that a small
filter shown in Figure 2 be used for the VIN input to suppress
transients which may occur at the input supply. This is par-
ticularly important when VIN is operated close to the maxi-
mum operating rating of the LM5015.
High Voltage VCC Regulator
The LM5015 VCC Low Drop Out (LDO) regulator allows the
LM5015 to operate at the lowest possible input voltage. When
power is applied to the VIN pin and the EN pin voltage is
greater than 0.45V, the VCC regulator is enabled, supplying
current into the external capacitor connected to the VCC pin.
When the VIN voltage is between 4.25V and 6.9V, the VCC
voltage is approximately equal to the VIN voltage. When the
voltage on the VIN pin exceeds 6.9V, the VCC pin voltage is
regulated at 6.9V. The total input operating range of the VCC
LDO regulator is 4.25V to 75V.
The output of the VCC regulator is current limited to 20mA.
During power-up, the VCC regulator supplies current into the
required decoupling capacitor (0.47 µF or greater ceramic
capacitor) at the VCC pin. When the voltage at the VCC pin
exceeds the VCC UVLO threshold of 3.75V and the EN pin is
greater than 1.26V the PWM controller is enabled and switch-
ing begins. The controller remains enabled until VCC falls
below 3.60V or the EN pin falls below 1.16V.
An auxiliary supply voltage can be applied to the VCC pin to
reduce the IC power dissipation. If the auxiliary voltage is
greater than 6.9V, the internal regulator will essentially shut-
off, and internal power dissipation will be decreased by the
VIN-VCC voltage difference times the operating current. The
externally applied VCC voltage should not exceed 14V. The
VCC regulator series pass MOSFET includes a body diode
(see Figure 1) between VCC and VIN that should not be for-
ward biased in normal operation. Therefore, the auxiliary VCC
voltage should never exceed the VIN voltage.
High Side Bootstrap Bias
The high side bootstrap bias provides power to drive the high
side power MOSFET. An external capacitor is required be-
tween the BST and the HO pins. A minimum capacitor value
of 0.022 µF is recommended. The capacitor is charged from
VCC via an internal diode during each power MOSFET off-
time.
Oscillator
A single external resistor connected between RT and AGND
pins sets the LM5015 oscillator frequency. To set a desired
oscillator frequency (F
sistor can be calculated from the following equation:
The tolerance of the external resistor and the frequency tol-
erance indicated in the Electrical Characteristics table must
be taken into account when determining the total variation of
the switching frequency.
SW
), the necessary value for the R
T
re-
10
External Synchronization
The LM5015 can be synchronized to the rising edge of an
external clock. Because the oscillator uses a divide-by-two
circuit, the switching frequency F
actually half the native oscillator frequency. Therefore, in or-
der to synchronize, the external clock must have a frequency
higher than twice the free running F
The clock signal should be coupled through a 100 pF capac-
itor into the RT pin. A peak voltage level greater than 3.2V at
the RT pin is required for detection of the sync pulse. The DC
voltage across the R
volts. The negative portion of the AC voltage of the synchro-
nizing clock is clamped to 1.5V by an amplifier inside the
LM5015 with approximately 100Ω output impedance. There-
fore, the AC pulse superimposed on the R
positive pulse amplitude of 1.7V or greater to successfully
synchronize the oscillator. The sync pulse width measured at
the RT pin should have a duration greater than 15 ns and less
than 5% of the switching period. The R
required, whether the oscillator is free running or externally
synchronized. The R
the device and connected directly to the RT and AGND pins
of the LM5015.
Enable / Standby
The LM5015 contains a dual level Enable circuit. When the
EN pin voltage is below 0.45V, the IC is in a low current shut-
down mode with the VCC LDO disabled. When the EN pin
voltage is raised above the 0.45V shutdown threshold but be-
low the 1.26V standby threshold, the VCC LDO regulator is
enabled, while the remainder of the IC is disabled. When the
EN pin voltage is raised above the 1.26V standby threshold,
all functions are enabled and normal operation begins. An in-
ternal 6 µA current source pulls up the EN pin to activate the
IC when the EN pin is left disconnected.
An external set-point resistor divider from VIN to AGND can
be used to determine the minimum operating input voltage of
the regulator. The divider must be designed such that the EN
pin exceeds the 1.26V standby threshold when VIN is in the
desired operating range. The internal 6 µA current source
should be included when determining the resistor values. The
shutdown and standby thresholds have 100 mV hysteresis to
prevent noise from toggling between modes. The EN pin is
internally protected by a 6V Zener diode through a 1 kΩ re-
sistor. The enabling voltage may exceed the Zener voltage,
however the Zener current should be limited to less than 4
mA.
Error Amplifier and PWM
Comparator
An internal high gain error amplifier generates an error signal
proportional to the difference between the regulated output
voltage and an internal precision reference. The output of the
error amplifier is connected to the COMP pin allowing the user
to add loop compensation, typically a Type II network, as il-
lustrated in Figure 3. This network creates a pole at the origin
that rolls off the high DC gain of the amplifier, which is nec-
essary to accurately regulate the output voltage. A zero pro-
vides phase boost near the open loop unity gain frequency,
and a high frequency pole attenuates switching noise. The
PWM comparator compares the current sense signal from the
current sense amplifier to the error amplifier output voltage at
the COMP pin.
T
T
resistor should be located very close to
resistor is internally regulated at 1.5
SW
SW
in the above equation is
set by the R
T
T
resistor must have
resistor is always
T
resistor.