lm5070sd-50 National Semiconductor Corporation, lm5070sd-50 Datasheet - Page 12

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lm5070sd-50

Manufacturer Part Number
lm5070sd-50
Description
Integrated Power Over Ethernet Pd Interface And Pwm Controller
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
Power Supply Operation / Current
Limit Programming
Once the UVLO threshold has been satisfied, the interface
controller of the LM5070 will charge up the SMPS input
capacitor through the internal power MOSFET. This load
capacitance provides input filtering for the power converter
section and must be at least 5uF per the IEEE 802.3af
specification. To accomplish the charging in a controlled
manner, the power MOSFET is current limited to 375mA.
The IEEE 802.3af specification requires that the load capaci-
tance be charged within 75ms.
Some legacy PSEs may not be able to supply the IEEE
maximum power of 15W to the PD, and this can be a
problem during startup. Low power PDs that are used in
these legacy systems will require a lower startup current
limit. The LM5070 can be programmed for a reduced inrush
current limit level with a resistor at RCLP pin. The program-
mable inrush current limit range is 75mA to 390mA. If the
RCLP pin is left open, the LM5070 will default to 390mA,
near the maximum allowed per the IEEE 802.3 specification.
To set a desired inrush current limit (limit), the RCLP resistor
can be calculated from:
The SMPS controller will not initiate operation until the load
capacitor is completely charged. The power sequencing be-
tween the interface circuitry and the SMPS controller occurs
automatically within the LM5070. Detection circuitry monitors
the RTN pin to detect interface startup completion. When the
RTN pin potential drops below 1.5V with respect to V
V
start function is enabled once the V
minimum operating voltage. The RCLP programmed inrush
current limit only applies to the initial charging phase. The
interface power MOSFET current limit will revert to the fixed
default protection current limit of 390mA once the SMPS is
powered up and the soft-start pin sequence begins.
High Voltage Start-Up Regulator
The LM5070 contains an internal high voltage startup regu-
lator that allows the input pin (V
IN) to be connected directly to line voltages as high as 75V.
The regulator output is internally current limited to 15mA.
The recommended capacitance range for the V
output is 0.1uF to 10uF. When the voltage on the V
reaches the regulation point of 7.8V, the controller output is
enabled. The controller will remain enabled until V
below 6.25V.
In typical applications, a transformer auxiliary winding is
diode connected to the V
the V
regulator. Though not required, powering V
iliary winding improves conversion efficiency while reducing
the power dissipated in the controller. The external V
capacitor must be selected such that the capacitor maintains
the V
(6.25V) during the initial start-up. During a fault condition
when the converter auxiliary winding is inactive, external
current draw on the V
CC
regulator of the SMPS controller is enabled. The soft-
CC
CC
voltage greater than the V
voltage above 8.1V to shut off the internal startup
CC
line should be limited such that the
CC
pin. This winding should raise
IN
CC
UVLO falling threshold
CC
regulator achieves
CC
from an aux-
CC
regulator
CC
EE
CC
, the
falls
pin
CC
12
power dissipated in the start-up regulator does not exceed
the maximum power dissipation capability of the LM5070
package.
Error Amplifier
An internal high gain error amplifier is provided within the
LM5070. The amplifier’s non-inverting reference is set to a
fixed reference voltage of 1.25V. The inverting input is con-
nected to the FB pin. In non-isolated applications, the power
converter output is connected to the FB pin via voltage
scaling resistors. Loop compensation components are con-
nected between the COMP and FB pins. For most isolated
applications the error amplifier function is implemented on
the secondary side of the converter and the internal error
amplifier is not used. The internal error amplifier is config-
ured as an open drain output and can be disabled by con-
necting the FB pin to ARTN. An internal 5K pull-up resistor
between a 5V reference and COMP can be used as the
pull-up for an optocoupler in isolated applications.
Current Limit / Current Sense
The LM5070 provides a cycle-by-cycle over current protec-
tion function. Current limit is accomplished by an internal
current sense comparator. If the voltage at the current sense
comparator input CS exceeds 0.5V with respect to RTN/
ARTN, the output pulse will be immediately terminated. A
small RC filter, located near the CS pin of the controller, is
recommended to filter noise from the current sense signal.
The CS input has an internal MOSFET which discharges the
CS pin capacitance at the conclusion of every cycle. The
discharge device remains on an additional 50ns after the
beginning of the new cycle to attenuate the leading edge
spike on the current sense signal.
The LM5070 current sense and PWM comparators are very
fast, and may respond to short duration noise pulses. Layout
considerations are critical for the current sense filter and
sense resistor. The capacitor associated with the CS filter
must be located very close to the device and connected
directly to the pins of the controller (CS and ARTN). If a
current sense transformer is used, both leads of the trans-
former secondary should be routed to the sense resistor and
the current sense filter network. A sense resistor located in
the source of the primary power MOSFET may be used for
current sensing, but a low inductance resistor is required.
When designing with a current sense resistor, all of the noise
sensitive low power ground connections should be con-
nected together local to the controller and a single connec-
tion should be made to the high current power return (sense
resistor ground point).
Oscillator, Shutdown and Sync
Capability
A single external resistor connected between the RT and
ARTN pins sets the LM5070 oscillator frequency. Internal to
the LM5070–50 device (50% duty cycle limited option) is an
oscillator divide by two circuit. This divide by two circuit
creates an exact 50% duty cycle clock which is used inter-
nally to create a precise 50% duty cycle limit function. Be-
cause of this divide by two, the internal oscillator actually
operates at twice the frequency of the output (OUT). For the
LM5070–80 device the oscillator frequency and the opera-
tional output frequency are the same. To set a desired output
operational frequency (F), the RT resistor can be calculated
from:

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