lm5041bsdx National Semiconductor Corporation, lm5041bsdx Datasheet - Page 11

• Manufacturer Part Number: lm5041bsdx
• Description: Cascaded Pwm Controller
• Manufacturer: National Semiconductor Corporation

Shutdown
Shutdown
Operation
Slope Compensation
The PWM comparator compares the current sense signal to
the voltage at the COMP pin. The output stage of the internal
error amplifier generally drives the COMP pin. At duty cycles
greater than 50%, current mode control circuits are subject to
sub-harmonic oscillation. By adding an additional fixed ramp
signal (slope compensation) to the current sense ramp, os-
cillations can be avoided. The LM5041B integrates this slope
compensation by buffering the internal oscillator ramp and
summing a current ramp generated by the oscillator internally
with the current sense signal. Additional slope compensation
may be provided by increasing the source impedance of the
current sense signal.
Soft-Start and Shutdown
The soft-start feature allows the power converter to gradually
reach the initial steady state operating point, thereby reducing
start-up stresses and surges. At power on, a 10 µA current is
sourced out of the soft-start pin (SS) to charge an external
capacitor. The capacitor voltage will ramp up slowly and will
limit the maximum duty cycle of the buck stage. In the event
of a fault as indicated by V
age the output drivers are disabled and the soft-start capacitor
is discharged to 0.7V. When the fault condition is no longer
present, a soft-start sequence will begin again and buck stage
duty cycle will gradually increase as the soft-start capacitor is
charged.
The SS pin also serves as an enable input of HD and LD. Both
HD and LD will be forced to a low state if the SS pin is below
the shutdown threshold of 0.45V.
Differences Between LM5041, LM5041A and LM5041B
Logic Table
Normal
MODE
UVLO
SS
BUCK driver states when the controller disabled
BUCK controller disabled by SS shutdown
Hiccup mode over-current protection
REF disabled by UVLO pin low state
UVLO
HIGH
HIGH
LOW
VCC disabled by SS shutdown
CONTROLS
CC
LOW
SS
Under-voltage, line Under-volt-
ITEM
-
-
LM5041A
LM5041B
LM5041A
LM5041B
LM5041A
LM5041B
DEVICE
LM5041
LM5041
LM5041
GND
GND
VCC
9V
9V
11
Thermal Protection
Internal Thermal Shutdown circuitry is provided to protect the
integrated circuit in the event that the maximum junction tem-
perature is exceeded. When activated, typically at 165 de-
grees Celsius, the controller is forced into a low-power
standby state, disabling the output drivers and the bias regu-
lator. This feature is provided to prevent catastrophic failures
from accidental device overheating.
Differences Between LM5041,
LM5041A and LM5041B
There are five differences between LM5041, LM5041A and
LM5041B. In the LM5041A and the LM5041B versions, the
hiccup mode over-current protection is not employed and the
VCC bias regulator is not disabled by SS pin shutdown state.
In the LM5041B version, both HD and LD will be low state
when the PWM controller disabled. In the LM5041 and the
LM5041B version, PWM controller is disabled by either a UV-
LO pin low state or SS pin shutdown state. Also in the
LM5041B version, the REF pin output is not disabled by a
UVLO pin low state. However, if VCC does not receive power
from an external source, the UVLO pin low state will disable
the internal VCC regulator and a VCC under-voltage condition
will eventually disable REF as the VCC voltage falls.
GND
GND
REF
5V
5V
HD : LOW
LD :HIGH
Available
LM5041
Yes
Yes
Yes
PIN STATES
PWM
LOW
LOW
HD
HD : LOW
LD : HIGH
LM5041A
N/A
Yes
No
No
PWM
HIGH
HIGH
LOW
LOW
LD
50% Duty Cycle
50% Duty Cycle
PUSH&PULL
HD : LOW
LM5041B
LD : LOW
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LOW
LOW
N/A
Yes
No
No