lm5025asdx National Semiconductor Corporation, lm5025asdx Datasheet - Page 11

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lm5025asdx

Manufacturer Part Number
lm5025asdx
Description
Active Clamp Voltage Mode Pwm Controller
Manufacturer
National Semiconductor Corporation
Datasheet
PWM Outputs
Compound Gate Drivers
The LM5025A contains two unique compound gate drivers,
which parallel both MOS and Bipolar devices to provide high
drive current throughout the entire switching event. The Bi-
polar device provides most of the drive current capability and
provides a relatively constant sink current which is ideal for
driving large power MOSFETs. As the switching event nears
conclusion and the Bipolar device saturates, the internal
MOS device continues to provide a low impedance to com-
pete the switching event.
During turn-off at the Miller plateau region, typically around
2V - 3V, is where gate driver current capability is needed
most. The resistive characteristics of all MOS gate drivers
are adequate for turn-on since the supply to output voltage
differential is fairly large at the Miller region. During turn-off
however, the voltage differential is small and the current
source characteristic of the Bipolar gate driver is beneficial to
provide fast drive capability.
PWM Comparator
The PWM comparator compares the ramp signal (RAMP) to
the loop error signal (COMP). This comparator is optimized
for speed in order to achieve minimum controllable duty
cycles. The internal 5kΩ pull-up resistor, connected between
(Continued)
20107413
FIGURE 1.
11
the internal 5V reference and COMP, can be used as the
pull-up for an optocoupler. The comparator polarity is such
that 0V on the COMP pin will produce a zero duty cycle on
both gate driver outputs.
Volt Second Clamp
The Volt x Second Clamp comparator compares the ramp
signal (RAMP) to a fixed 2.5V reference. By proper selection
of RFF and CFF, the maximum ON time of the main switch
can be set to the desired duration. The ON time set by Volt
x Second Clamp varies inversely with the line voltage be-
cause the RAMP capacitor is charged by a resistor con-
nected to Vin while the threshold of the clamp is a fixed
voltage (2.5V). An example will illustrate the use of the Volt x
Second Clamp comparator to achieve a 50% duty cycle limit,
at 200KHz, at a 48V line input: A 50% duty cycle at a 200KHz
requires a 2.5µs of ON time. At 48V input the Volt x Second
product is 120V x µs (48V x 2.5µs). To achieve this clamp
level:
Select C
R
The recommended capacitor value range for CFF is 100pF
to 1000pF.
The C
every cycle by an internal discharge switch controlled by
either the internal clock or by the V x S Clamp comparator,
whichever event occurs first.
Current Limit
The LM5025A contains two modes of over-current protec-
tion. If the sense voltage at the CS1 input exceeds 0.5V the
present power cycle is terminated (cycle-by-cycle current
limit). If the sense voltage at the CS2 input exceeds 0.5V, the
controller will terminate the present cycle, discharge the
softstart capacitor and reduce the softstart current source to
1µA. The softstart (SS) capacitor is released after being fully
discharged and slowly charges with a 1µA current source.
When the voltage at the SS pin reaches approximately 1V,
FF
= 102kΩ
FF
FF
ramp capacitor is discharged at the conclusion of
= 470pF
R
FF
48 x 2.5µ / 2.5 = 48µ
x C
FF
= V
IN
x T
ON
20107412
/ 2.5V
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