mx881 Clare, Inc., mx881 Datasheet - Page 9
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mx881
Manufacturer Part Number
mx881
Description
Enon Flash Controller & Led Torch Driver
Manufacturer
Clare, Inc.
Datasheet
1.MX881.pdf
(13 pages)
MX881
To write to the MX881 register, the master device will first issue a Start Bit. It will then transmit a 7-bit
address. In the MX881, the address is internally set to 0111111b. If the address in the message
corresponds to the address of the MX881, the device will issue an acknowledge. The master will send 8
bits of data. These 8 bits will be written into the control register. Another Acknowledge will follow. The
write sequence is illustrated in Figure 2.
To read the control register the master issues a read command by setting the R/Wn bit. The master will
then tri-state the data bus while the MX881 outputs data. See the example in Figure 2.
3-Wire SPI (Serial Peripheral Interface)
A standard 3-wire bi-directional serial interface is available (Figure 3). The interface signals are the serial
clock: SCLK, the serial data line: SDATA, and the serial chip enable: SCEn. SDATA is bidirectional.
In write mode, the microcontroller is writing to the MX881 control register. Each packet sent contains an
8-bit command followed by 8 bits of data to be written into the register.
When SCEn goes low, the rising edge of SCLK clocks in 8 bits, MSB first. At the end of the first
transmission byte, the MX881 determines whether the first byte is a recognized command. The MX881
only recognizes one write command “00011110”. If the command is recognized, the next byte clocked
into the MX881 will be written into the control register. This sequence is illustrated in Figure 3.
In read mode, a command is received which tells the MX881 to output the control register contents. The
MX881 only recognizes one read command: “01011110”. If the correct command is recognized, the
MX881 will output 8 bits of data beginning on the first falling edge of SCLK after the rising edge of SCLK
in which the last transmission bit was clocked in. In this manner, the first control register bit will be
available to the microcontroller on the next rising edge of SCLK. SCEn must remain low while the
MX881 is outputting data, going high after the MX881 has output the last bit. While the device is
outputting data, the microcontroller must stop driving the SDATA line so that the MX881 can drive the
data onto this bus. This sequence is also illustrated in Figure 3.
Table 4 - Serial Interface Timing
MX881
Drawing No. 088109
Symbol
T
T
T
T
T
T
T
T
T
T
T
T
T
T
CYCS
HI
DS
DH
SS
SH
ACCS
OHS
I2C_CS
I2C_SC
I2C_DS
I2C_DH
I2C_CP
I2C_PC
, T
LO
Parameter
Cycle Time
Pulse Width
Data Setup Time
Data Hold Time
SCEn Setup Time, Write
SCEn Hold Time, Write
Read Access Time
Read Output Disable Time
I
I
I
I
I
I
2
2
2
2
2
2
C Clock High to Start Bit
C Start Bit to Clock Low
C Data Valid to Clock High
C Clock Low to Data Change
C Clock High to Stop Bit
C Stop Bit to Clock Low
9
C
C
Condition
L
L
= 100pF
= 100pF
Min
250
30
50
50
30
30
50
50
50
30
50
50
Max
30
30
IXYS
www.claremicronix.com
Units
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
7/30/07