lt3071 Linear Technology Corporation, lt3071 Datasheet - Page 18

• Manufacturer Part Number: lt3071
• Description: Lt3071 5a, Low Noise, Programmable Output, 85mv Dropout Linear Regulator With Analog Margining Features
• Manufacturer: Linear Technology Corporation

LT3071
ApplicAtions inFormAtion
Typical 0603 or 0805 case-size capacitors have an ESL of
~800pH and PCB mounting can contribute up to ~200pH.
Thus, it becomes necessary to reduce the parasitic
inductance by using a parallel capacitor combination.
A suitable methodology must control this paralleling as
capacitors with the same self-resonant frequency, f
form a tank circuit that can induce ringing of their own
accord. Small amounts of ESR (5mΩ to 20mΩ) have some
benefit in dampening the resonant loop, but higher ESRs
degrade the capacitor response to transient load steps
with rise/fall times less than 1µs. The most area efficient
parallel capacitor combination is a graduated 4/2/1 scale
of f
individual ESLs are relatively uniform, and the resonance
peaks are deconstructively spread beyond the regulator
bandwidth. The recommended parallel combination that
approximates 15µF is 10µF + 4.7µF + 2.2µF . Capacitors
with case sizes larger than 0805 have higher ESL and
lower ESR (<5mΩ). Therefore, more capacitors with
smaller values (<10µF) must be chosen. Users should
consider new generation, low inductance capacitors to
push out f
mount ceramic capacitor manufacturer’s data sheets for
capacitor specifications. Figure 3 illustrates an optimum
PCB layout for the parallel output capacitor combination,
but also illustrates the GND connection between the IN
capacitor and the OUT capacitors to minimize the AC
GND loop for fast load transients. This tight bypassing
connection minimizes EMI and optimizes bypassing.

R
of the same case size. Under these conditions, the
R
and maximize stability. Refer to the surface
Low-Z
INPUT
47µF
Figure 3. Example PCB Layout
IN OUT
LT3071
SENSE
GND
R
, will
2.2µF
4.7µF
10µF
Many of the applications in which the LT3071 excels,
such as FPGA, ASIC processor or DSP supplies, typically
require a high frequency decoupling capacitor network for
the device being powered. This network generally consists
of many low value ceramic capacitors in parallel. In some
applications, this total value of capacitance may be close
to the LT3071’s minimum 15µF capacitance requirement.
This may reduce the required value of capacitance directly
at the LT3071’s output. Multiple low value capacitors in
parallel present a favorable frequency characteristic that
pushes many of the parasitic poles/zeroes beyond the
LT3071’s unity-gain crossover frequency. This technique
illustrates the method that extracts the full bandwidth
performance of the LT3071.
Give additional consideration to the use of ceramic capaci-
tors. Ceramic capacitors are manufactured with a variety of
dielectrics, each with different behavior across temperature
and applied voltage. The most common dielectrics used
are specified with EIA temperature characteristic codes of
Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are
good for providing high capacitances in a small package,
but they tend to have strong voltage and temperature
coefficients as shown in Figures 4 and 5. When used with
a 5V regulator, a 16V 10µF Y5V capacitor can exhibit an
effective value as low as 1µF to 2µF for the DC bias voltage
applied and over the operating temperature range. The X5R
and X7R dielectrics result in more stable characteristics
and are more suitable for use as the output capacitor.
3071 F03
LOAD PLANE
3071fa