x3102v28 Intersil Corporation, x3102v28 Datasheet
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x3102v28
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x3102v28 Summary of contents
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... Record battery history to optimize gas gauge, track pack failures and monitor system use • Reduce power to extend battery life • Increase battery capacity and improve cycle life battery life Ordering Information PART NUMBER X3102V28 VCC RGP RGC RGO UVP/OCP OVP/LMON ...
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Functional Diagram VCELL1 CB1 VCELL2 Over-charge Over-discharge CB2 Sample Rate Protection Sense VCELL3 Circuits CB3 VSS Overcurrent Protection & NC Current Sense VSS VCS1 Pin Names PIN SYMBOL 1 VCELL1 Battery cell 1 voltage input. This pin is used to ...
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Pin Names (Continued) PIN SYMBOL 15 AO Analog multiplexer output. The analog output pin is used to externally monitor various battery parameter voltages. The voltages which can be monitored at AO (See section “Analog Multiplexer Selection” on page 25) are: ...
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Absolute Maximum Ratings Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . .-55 to 125°C Operating temperature ...
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Operating Specifications Over the recommended operating conditions unless otherwise specified (Continued) SYMBOL DESCRIPTION V Cell over-charge protection mode voltage OV (Note 4) threshold (Default in Boldface) V Cell over-charge protection mode release OVR voltage threshold T Cell over-charge detection time ...
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Operating Specifications Over the recommended operating conditions unless otherwise specified (Continued) SYMBOL DESCRIPTION V Cell charge threshold voltage CE V X3102 wake-up voltage (For Vcc above SLR this voltage, the device wakes up) V X3102 sleep voltage (For Vcc above ...
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Capacitance T = +25° 1MHz SYMBOL C (Note 8) Output capacitance (SO) OUT C (Note 8) Input capacitance (SCK, SI, CS) IN NOTE: 8. This parameter is not 100% tested. Equivalent A.C. Load Circuit 5V 2061: ...
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Serial Output Timing SYMBOL f Clock Frequency SCK t Output Disable Time DIS t Output Valid from Clock LOW V t Output Hold Time HO t (Note 11) Output Rise Time RO t (Note 11) Output Fall Time FO NOTE: ...
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Analog Output Response Time SYMBOL t AO Output Stabilization Time (Voltage Source Change) VSC t AO Output Stabilization Time (Current Sense Gain Change) CSGO t Control Outputs Response Time (UVP/OCP, OVP/MON, CB4, CB3, CB2, CB1, RGC) CO Change in Voltage ...
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Typical Operating Characteristics 150 125 100 75 50 -20 25 TEMPERATURE FIGURE 1. NORMAL OPERATING CURRENT 4.40 4.35 4.35V 4.30 4.3V 4.25 4.25V 4.20 4.2V 4.15 -25 25 TEMPERATURE (°C) FIGURE 3. OVER CHARGE TRIP VOLTAGE (TYPICAL) 2.60 2.55V 2.55 ...
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Principles of Operation The X3102 provides two distinct levels of functionality and battery cell protection: First, in Normal mode, the device periodically checks each cell for an over-charge and over-discharge state, while continuously watching for a pack overcurrent condition. A ...
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BAT54 BAT54 Discharge FET I LMT † R Li-Ion cells LMT 1µ RGP VCELL1 100 R CB 0.01µ CB1 3 VCELL2 100 R CB ...
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The capacitors on the CELL1 CELL4 a first order low pass filter configuration, at the battery cell voltage monitoring inputs (VCELL1–VCELL4) of the X3102. This filter is used to block any unwanted interference signals from being inadvertently ...
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T PUR V SLR RGO 0V Voltage Regulator Output Status (Internal Signal) VRGS Overcurrent Detection Status (Internal Signal) OCDS Status Register Bit 0 VRGS+OCDS Status Register Bit 2 (SWCEN = 0) CCES+OVDS Status Register Bit 2 ...
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Configuration Register The X3102 can be configured for specific user requirements using the Configuration Register. TABLE 1. CONFIGURATION REGISTER FUNCTIONALITY BIT(s) NAME 0-5 – (don’t care) 6 SWCEN Switch Cell Charge Enable threshold function ON/OFF 7 CELLN Set the number ...
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Cell Number Selection The X3102 is designed to operate with three (3) Li-Ion battery cells. The CELLN bit of the configuration register (Table 9) sets the number of cells recognized. For the X3102, the value for CELLN should always be ...
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The functions that can be manipulated by the Control Register are shown in Table 12. TABLE 12. CONTROL REGISTER FUNCTIONALITY BIT(S) NAME FUNCTION 0–4 – (don’t care Reserved—write 0 to these locations. 7 SLP ...
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The function of each bit in the status register is shown in Table 18. Bit 0 of the status register (VRGS + OCDS) actually indicates the status of two conditions of the X3102. Voltage Regulator Status (VRGS internally ...
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X3102 Internal Protection Functions The X3102 provides periodic monitoring (See section “Periodic Protection Monitoring” on page 19) for over-charge and over-discharge states and continuous monitoring for an overcurrent state. It has automatic shutdown when a protection mode is encountered, as ...
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TABLE 20. OVER-CHARGE PROTECTION MODE-EVENT DIAGRAM DESCRIPTION EVENT [0,1) • Discharge FET is ON (UVP/OCP=V • Charge FET is ON (OVP/LMON=V • All cell voltages (V – V CELL • The device is in normal operation mode (i.e. not in ...
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UVP/OCP and OVP/LMON via bits UVPC and OVPC in the control register is also prohibited. The device returns from sleep mode when V when the battery terminals are connected to a battery charger). In this case, the X3102 restores the ...
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TABLE 22. OVER-DISCHARGE PROTECTION MODE—EVENT DIAGRAM DESCRIPTION EVENT [0,1) • Charge FET is ON (OVP/LMON = V • Discharge FET is ON (UVP/OCP = V • All cell voltages (VCELL –VCELL 1 • The device is in normal operation mode ...
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Overcurrent Protection In addition to monitoring the battery cell voltages, the X3102 continually monitors the voltage VCS 21 across the current sense resistor (R SENSE for a time exceeding T , then the device enters overcurrent OC protection mode (Figure ...
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Normal Operation Mode VCS UVP/OCP Event 0 1 FIGURE 14. OVERCURRENT PROTECTION MODE - EVENT DIAGRAM TABLE 24. OVERCURRENT PROTECTION MODE-EVENT DIAGRAM DESCRIPTION EVENT [0,1) • Discharge FET is ON (OCP = Vss). ...
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Monitor Mode Analog Multiplexer Selection The X3102 can be used to externally monitor individual battery cell voltages, and battery current. Each quantity can be monitored at the analog output pin (AO), and is selected using the analog select (AS0–AS2) pins ...
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Voltage Regulator The X3102 is able to supply peripheral devices with a regulated 5VDC±0.5% output at pin RGO. The voltage regulator should be configured externally as shown in Figure 16. The non-inverting input of OP1 is fed with a high ...
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Prior to any attempt to perform an IDLock operation, the WREN instruction must first be issued. This instruction sets the “Write Enable” latch and allows the part to respond to an IDLock sequence. The EEPROM memory may then be SET ...
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Write Enable/Write Disable (WREN/WRDI) Any write to a nonvolatile array or register, requires the WREN command be sent prior to the write command. This command sets an internal latch allowing the write operation to proceed. The WRDI command resets the ...
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SCK EEWRITE Instruction SCK Data Byte FIGURE 19. EEPROM PAGE WRITE (EEWRITE) OPERATION SEQUENCE SCK EEREAD ...
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SCK EEREAD Instruction (1 Byte) SI High Impedance SO FIGURE 21. EEPROM (EEREAD) READ OPERATION SEQUENCE SCK WCFIG Instruction SI High Impedance SO FIGURE 22. WRITE CONFIGURATION REGISTER (WCFIG) OPERATION SEQUENCE ...
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Read Status Register (RDSTAT) The Read Status Register (RDSTAT) command returns the status of the X3102. The Status Register contains three bits that indicate whether the voltage regulator is stabilized, and if there are any protection failure conditions. The operation ...
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... Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...