lm2637mx National Semiconductor Corporation, lm2637mx Datasheet - Page 9

• Manufacturer Part Number: lm2637mx
• Description: Motherboard Power Supply Solution With A 5-bit Programmable Switching Controller And Two Linear Regulator Controllers
• Manufacturer: National Semiconductor Corporation

Applications Information
provides two levels of protection. The first turns off the
high-side FET and turns on the low-side. The second pro-
vides a gate signal that can be used to fire an external SCR.
The PWM frequency is adjustable from 50 kHz to beyond 1
MHz through an external resistor.
Soft start is realized through an internal digital counter. No
external soft start capacitor is necessary.
Dynamic positioning of the switcher output voltage reduces
the number of output capacitors and can be easily realized
using the same sense resistor as the over-current protection.
Linear Section — The two linear regulator controllers feature
wide control bandwidth, N-FET and NPN transistor driving
capability, an adjustable output voltage and a typical 2%
tolerance. The wide control bandwidth makes meeting the
GTL+ bus transient response requirement an easy job.
When no external resistor divider is used, the two controllers
default to 1.5V and 2.5V respectively.
Both linear sections have under-voltage latch-off. Should the
output voltage drop below 0.63V, the corresponding gate
drive will be disabled and PWGD pin will be pulled low.
THEORY OF OPERATION
Start Up
Switching Section — The soft start circuitry starts to work
when three conditions are met, i.e., EN pin is a logic high, the
VID code is valid and V
duration of the soft start is determined by an internal digital
counter and the switching frequency. During soft start, the
output of the error amplifier is allowed to increase gradually.
When the counter has counted 4,096 clock cycles, soft start
session ends and the output level of the error amplifier is
released and allowed to go to a value that is determined by
the feedback loop. PWRGD pin is always low during soft
start and is turned over to output voltage monitoring circuitry
after that. Before V
power-on-reset state and the two FET drivers are disabled.
The power supply designer is cautioned to avoid the situa-
tion when V
When V
LM2637 may not be in a controlled state. If at this time V
of greater than 1V is applied, the HG and LG may be pulled
up simultaneously, causing a potential shoot-through and
thus possibly preventing V
Preferred Startup Timing for the recommended timing se-
quence.
During normal operation, if V
the internal circuitry will go into power-on-reset again. The
hysteresis helps decrease the noise sensitivity on the V
pin.
After soft start ends and during normal operation, if the
converter output voltage exceeds 118% of DAC output volt-
age, the LM2637 will lock into over-voltage protection mode.
The high-side drive will be low, and the low-side drive will be
high. There are two ways to clear the mode. One is to cycle
V
the over-voltage protection mode is cleared, the LM2637 will
enter the soft start session and start over.
Linear Section — The linear section does not go through a
soft start. Whenever the soft start of the switching section
begins, the linear section immediately applies the required
gate voltages or base currents for external power transistors.
There is an under-voltage latch-off for the linear section. If
CC
voltage once. The other is to toggle the EN level. After
CC
DD
is less than 1.8V, the internal circuitry of the
is higher than 1V while V
CC
reaches 4V, all internal logic is in a
CC
CC
pin voltage exceeds 4.2V. The
CC
to come up properly. See
voltage drops below 3.6V,
CC
is less than 1.8V.
(Continued)
DD
CC
9
after soft start ends, SNS2 or SNS3 is below 0.63V, the
corresponding gate drive will be disabled and PWGD pin will
be pulled low.
Normal Operation
Switching Section — In the normal operation mode, the
LM2637 regulates the converter output voltage by adjusting
the duty ratio. The output voltage is determined by the 5-bit
VID code set by the user or MPU.
The PWM frequency is set by an external resistor between
FREQ pin and ground. The resistance needed for a desired
PWM frequency can be determined by the following equa-
tion:
For example, if the desired PWM frequency is 300 kHz, the
resistance should be around 84 kΩ.
The minimum allowable PWM frequency is 5 kHz.
Linear Section — Under steady state operation, the linear
section supplies the appropriate gate voltage or base current
to correctly bias the external pass transistor so that the
voltage drop across the transistor is the right value.
Resetting the LM2637
When the LM2637 detects an abnormal condition such as
switching regulator over voltage, it will latch itself off partially
or completely. To reset the LM2637, either EN or V
has to be toggled. Another more subtle way to recover is to
float all the VID pins and reapply the correct code.
Gate Drives
Switching Section — The switching controller has two gate
drives that are suitable for driving external power N-FETs in
a synchronous buck topology. The voltage for the two FET
drivers is supplied by the V
be at least one V
be able to fully enhance the high-side FET. In a typical PC
motherboard application, it is recommended that 12V be
applied to V
switcher. A charge pump is not recommended since the
linear sections need a stable V
frequency noise.
For a V
2A, and the peak gate discharging current is typically 6A,
well suited for high speed switching.
The LM2637 gate drives are of BiCMOS design. Unlike
some bipolar control ICs, the gate drive has rail-to-rail swing
that ensures no spurious turn-on due to capacitive coupling.
Another feature of the FET gate drives is the adaptive non-
overlapping mechanism. A gate drive is not turned on until
the other is fully off. The dead time in between is typically 20
ns. This avoids the potential shoot-through problem and
helps improve efficiency.
Linear Section — The gate drives of the linear section can
put out a maximum continuous current of about 40 mA. The
typical low gate voltage is 1.2V.
Load Transient Response
Switching Section — In a typical modern MPU application
such as the M II, Pentium II and K6-2 core power supply,
load transient response is a critical issue. The LM2637 uti-
lizes the conventional voltage feedback technology as the
primary feedback control method. When the load transient
DD
of 12V, the peak gate charging current is typically
DD
, and 5V be used as the input voltage for the
GS
(th) higher than converter input voltage to
DD
pin. This V
DD
voltage to minimize high
DD
voltage should
www.national.com
CC
voltage
(1)